1f196044dSBo Shen /* 2f196044dSBo Shen * Configuration settings for the SAMA5D4 Xplained ultra board. 3f196044dSBo Shen * 4f196044dSBo Shen * Copyright (C) 2014 Atmel 5f196044dSBo Shen * Bo Shen <voice.shen@atmel.com> 6f196044dSBo Shen * 7f196044dSBo Shen * SPDX-License-Identifier: GPL-2.0+ 8f196044dSBo Shen */ 9f196044dSBo Shen 10f196044dSBo Shen #ifndef __CONFIG_H 11f196044dSBo Shen #define __CONFIG_H 12f196044dSBo Shen 13*b2d387bcSWu, Josh /* No NOR flash, this definition should put before common header */ 14*b2d387bcSWu, Josh #define CONFIG_SYS_NO_FLASH 15f196044dSBo Shen 16*b2d387bcSWu, Josh #include "at91-sama5_common.h" 17f196044dSBo Shen 18f196044dSBo Shen /* serial console */ 19f196044dSBo Shen #define CONFIG_ATMEL_USART 20f196044dSBo Shen #define CONFIG_USART_BASE ATMEL_BASE_USART3 21f196044dSBo Shen #define CONFIG_USART_ID ATMEL_ID_USART3 22f196044dSBo Shen 23f196044dSBo Shen /* SDRAM */ 24f196044dSBo Shen #define CONFIG_NR_DRAM_BANKS 1 25f196044dSBo Shen #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 26f196044dSBo Shen #define CONFIG_SYS_SDRAM_SIZE 0x20000000 27f196044dSBo Shen 280b2a9824SBo Shen #ifdef CONFIG_SPL_BUILD 290b2a9824SBo Shen #define CONFIG_SYS_INIT_SP_ADDR 0x210000 300b2a9824SBo Shen #else 31f196044dSBo Shen #define CONFIG_SYS_INIT_SP_ADDR \ 32f196044dSBo Shen (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 330b2a9824SBo Shen #endif 34f196044dSBo Shen 35f196044dSBo Shen #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 36f196044dSBo Shen 37f196044dSBo Shen /* SerialFlash */ 38f196044dSBo Shen #define CONFIG_CMD_SF 39f196044dSBo Shen 40f196044dSBo Shen #ifdef CONFIG_CMD_SF 41f196044dSBo Shen #define CONFIG_ATMEL_SPI 42f196044dSBo Shen #define CONFIG_ATMEL_SPI0 43f196044dSBo Shen #define CONFIG_SPI_FLASH 44f196044dSBo Shen #define CONFIG_SPI_FLASH_ATMEL 45f196044dSBo Shen #define CONFIG_SF_DEFAULT_BUS 0 46f196044dSBo Shen #define CONFIG_SF_DEFAULT_CS 0 47f196044dSBo Shen #define CONFIG_SF_DEFAULT_SPEED 30000000 48f196044dSBo Shen #endif 49f196044dSBo Shen 50f196044dSBo Shen /* NAND flash */ 51f196044dSBo Shen #define CONFIG_CMD_NAND 52f196044dSBo Shen 53f196044dSBo Shen #ifdef CONFIG_CMD_NAND 54f196044dSBo Shen #define CONFIG_NAND_ATMEL 55f196044dSBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE 1 56f196044dSBo Shen #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 57f196044dSBo Shen /* our ALE is AD21 */ 58f196044dSBo Shen #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 59f196044dSBo Shen /* our CLE is AD22 */ 60f196044dSBo Shen #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 61f196044dSBo Shen #define CONFIG_SYS_NAND_ONFI_DETECTION 62f196044dSBo Shen /* PMECC & PMERRLOC */ 63f196044dSBo Shen #define CONFIG_ATMEL_NAND_HWECC 64f196044dSBo Shen #define CONFIG_ATMEL_NAND_HW_PMECC 65f196044dSBo Shen #endif 66f196044dSBo Shen 67f196044dSBo Shen /* MMC */ 68f196044dSBo Shen #define CONFIG_CMD_MMC 69f196044dSBo Shen 70f196044dSBo Shen #ifdef CONFIG_CMD_MMC 71f196044dSBo Shen #define CONFIG_MMC 72f196044dSBo Shen #define CONFIG_GENERIC_MMC 73f196044dSBo Shen #define CONFIG_GENERIC_ATMEL_MCI 74f196044dSBo Shen #define ATMEL_BASE_MMCI ATMEL_BASE_MCI1 75f196044dSBo Shen #endif 76f196044dSBo Shen 77f196044dSBo Shen /* USB */ 78f196044dSBo Shen #define CONFIG_CMD_USB 79f196044dSBo Shen 80f196044dSBo Shen #ifdef CONFIG_CMD_USB 81f196044dSBo Shen #define CONFIG_USB_EHCI 82f196044dSBo Shen #define CONFIG_USB_EHCI_ATMEL 83f196044dSBo Shen #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 84f196044dSBo Shen #define CONFIG_USB_STORAGE 85f196044dSBo Shen #endif 86f196044dSBo Shen 8752305a82SBo Shen /* USB device */ 8852305a82SBo Shen #define CONFIG_USB_GADGET 8952305a82SBo Shen #define CONFIG_USB_GADGET_DUALSPEED 9052305a82SBo Shen #define CONFIG_USB_GADGET_ATMEL_USBA 9152305a82SBo Shen #define CONFIG_USB_ETHER 9252305a82SBo Shen #define CONFIG_USB_ETH_RNDIS 9352305a82SBo Shen #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D4EK" 9452305a82SBo Shen 95f196044dSBo Shen #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 96f196044dSBo Shen #define CONFIG_CMD_FAT 97f196044dSBo Shen #define CONFIG_DOS_PARTITION 98f196044dSBo Shen #endif 99f196044dSBo Shen 100f196044dSBo Shen /* Ethernet Hardware */ 101f196044dSBo Shen #define CONFIG_MACB 102f196044dSBo Shen #define CONFIG_RMII 103f196044dSBo Shen #define CONFIG_NET_RETRY_COUNT 20 104f196044dSBo Shen #define CONFIG_MACB_SEARCH_PHY 105f196044dSBo Shen 106f196044dSBo Shen /* LCD */ 107f196044dSBo Shen /* #define CONFIG_LCD */ 108f196044dSBo Shen #ifdef CONFIG_LCD 109f196044dSBo Shen #define LCD_BPP LCD_COLOR16 110f196044dSBo Shen #define LCD_OUTPUT_BPP 24 111f196044dSBo Shen #define CONFIG_LCD_LOGO 112f196044dSBo Shen #define CONFIG_LCD_INFO 113f196044dSBo Shen #define CONFIG_LCD_INFO_BELOW_LOGO 114f196044dSBo Shen #define CONFIG_SYS_WHITE_ON_BLACK 115f196044dSBo Shen #define CONFIG_ATMEL_HLCD 116f196044dSBo Shen #define CONFIG_ATMEL_LCD_RGB565 117f196044dSBo Shen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 118f196044dSBo Shen #endif 119f196044dSBo Shen 120f196044dSBo Shen #ifdef CONFIG_SYS_USE_SERIALFLASH 121f196044dSBo Shen /* bootstrap + u-boot + env + linux in serial flash */ 122f196044dSBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH 123f196044dSBo Shen #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 124f196044dSBo Shen #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 125f196044dSBo Shen #define CONFIG_ENV_OFFSET 0x10000 126f196044dSBo Shen #define CONFIG_ENV_SIZE 0x10000 127f196044dSBo Shen #define CONFIG_ENV_SECT_SIZE 0x1000 128f196044dSBo Shen #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 129f196044dSBo Shen "sf read 0x21000000 0xa0000 0x60000; " \ 130f196044dSBo Shen "sf read 0x22000000 0x100000 0x300000; " \ 131f196044dSBo Shen "bootz 0x22000000 - 0x21000000" 132f196044dSBo Shen #elif CONFIG_SYS_USE_NANDFLASH 133f196044dSBo Shen /* bootstrap + u-boot + env in nandflash */ 134f196044dSBo Shen #define CONFIG_ENV_IS_IN_NAND 135f196044dSBo Shen #define CONFIG_ENV_OFFSET 0xc0000 136f196044dSBo Shen #define CONFIG_ENV_OFFSET_REDUND 0x100000 137f196044dSBo Shen #define CONFIG_ENV_SIZE 0x20000 138f196044dSBo Shen #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \ 139f196044dSBo Shen "nand read 0x22000000 0x200000 0x600000;" \ 140f196044dSBo Shen "bootz 0x22000000 - 0x21000000" 141f196044dSBo Shen #elif CONFIG_SYS_USE_MMC 142f196044dSBo Shen /* bootstrap + u-boot + env in sd card */ 143f196044dSBo Shen #define CONFIG_ENV_IS_IN_FAT 144f196044dSBo Shen #define CONFIG_FAT_WRITE 145f196044dSBo Shen #define FAT_ENV_INTERFACE "mmc" 146f196044dSBo Shen /* 147f196044dSBo Shen * We don't specify the part number, if device 0 has partition table, it means 148f196044dSBo Shen * the first partition; it no partition table, then take whole device as a 149f196044dSBo Shen * FAT file system. 150f196044dSBo Shen */ 151f196044dSBo Shen #define FAT_ENV_DEVICE_AND_PART "0" 152f196044dSBo Shen #define FAT_ENV_FILE "uboot.env" 153f196044dSBo Shen #define CONFIG_ENV_SIZE 0x4000 154f196044dSBo Shen #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91-sama5d4_xplained.dtb; " \ 155f196044dSBo Shen "fatload mmc 0:1 0x22000000 zImage; " \ 156f196044dSBo Shen "bootz 0x22000000 - 0x21000000" 157f196044dSBo Shen #endif 158f196044dSBo Shen 159f196044dSBo Shen 1600b2a9824SBo Shen 1610b2a9824SBo Shen /* SPL */ 1620b2a9824SBo Shen #define CONFIG_SPL_FRAMEWORK 1630b2a9824SBo Shen #define CONFIG_SPL_TEXT_BASE 0x200000 1640b2a9824SBo Shen #define CONFIG_SPL_MAX_SIZE 0x10000 1650b2a9824SBo Shen #define CONFIG_SPL_BSS_START_ADDR 0x20000000 1660b2a9824SBo Shen #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 1670b2a9824SBo Shen #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 1680b2a9824SBo Shen #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 1690b2a9824SBo Shen 1700b2a9824SBo Shen #define CONFIG_SPL_LIBCOMMON_SUPPORT 1710b2a9824SBo Shen #define CONFIG_SPL_LIBGENERIC_SUPPORT 1720b2a9824SBo Shen #define CONFIG_SPL_GPIO_SUPPORT 1730b2a9824SBo Shen #define CONFIG_SPL_SERIAL_SUPPORT 1740b2a9824SBo Shen 1750b2a9824SBo Shen #define CONFIG_SPL_BOARD_INIT 1760b2a9824SBo Shen #define CONFIG_SYS_MONITOR_LEN (512 << 10) 1770b2a9824SBo Shen 1780b2a9824SBo Shen #ifdef CONFIG_SYS_USE_MMC 179993ea97eSBo Shen #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds 1800b2a9824SBo Shen #define CONFIG_SPL_MMC_SUPPORT 1810b2a9824SBo Shen #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 1820b2a9824SBo Shen #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 1830b2a9824SBo Shen #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 1840b2a9824SBo Shen #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 1850b2a9824SBo Shen #define CONFIG_SPL_FAT_SUPPORT 1860b2a9824SBo Shen #define CONFIG_SPL_LIBDISK_SUPPORT 1870b2a9824SBo Shen 1880b2a9824SBo Shen #elif CONFIG_SYS_USE_NANDFLASH 1890b2a9824SBo Shen #define CONFIG_SPL_NAND_SUPPORT 1900b2a9824SBo Shen #define CONFIG_SPL_NAND_DRIVERS 1910b2a9824SBo Shen #define CONFIG_SPL_NAND_BASE 1920b2a9824SBo Shen #define CONFIG_PMECC_CAP 8 1930b2a9824SBo Shen #define CONFIG_PMECC_SECTOR_SIZE 512 1940b2a9824SBo Shen #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 1950b2a9824SBo Shen #define CONFIG_SYS_NAND_5_ADDR_CYCLE 1960b2a9824SBo Shen #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 1970b2a9824SBo Shen #define CONFIG_SYS_NAND_PAGE_COUNT 64 1980b2a9824SBo Shen #define CONFIG_SYS_NAND_OOBSIZE 224 1990b2a9824SBo Shen #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 2000b2a9824SBo Shen #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 2010b2a9824SBo Shen #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 2020b2a9824SBo Shen 2030b2a9824SBo Shen #elif CONFIG_SYS_USE_SERIALFLASH 2040b2a9824SBo Shen #define CONFIG_SPL_SPI_SUPPORT 2050b2a9824SBo Shen #define CONFIG_SPL_SPI_FLASH_SUPPORT 2060b2a9824SBo Shen #define CONFIG_SPL_SPI_LOAD 2070b2a9824SBo Shen #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 2080b2a9824SBo Shen 2090b2a9824SBo Shen #endif 210f196044dSBo Shen #endif 211