xref: /rk3399_rockchip-uboot/include/configs/sama5d4_xplained.h (revision 0b2a9824203deccf8e5ffd0db69f6aa9b771eb26)
1f196044dSBo Shen /*
2f196044dSBo Shen  * Configuration settings for the SAMA5D4 Xplained ultra board.
3f196044dSBo Shen  *
4f196044dSBo Shen  * Copyright (C) 2014 Atmel
5f196044dSBo Shen  *		      Bo Shen <voice.shen@atmel.com>
6f196044dSBo Shen  *
7f196044dSBo Shen  * SPDX-License-Identifier:	GPL-2.0+
8f196044dSBo Shen  */
9f196044dSBo Shen 
10f196044dSBo Shen #ifndef __CONFIG_H
11f196044dSBo Shen #define __CONFIG_H
12f196044dSBo Shen 
13f196044dSBo Shen #include <asm/hardware.h>
14f196044dSBo Shen 
15f196044dSBo Shen #define CONFIG_SYS_TEXT_BASE		0x26f00000
16f196044dSBo Shen 
17f196044dSBo Shen /* ARM asynchronous clock */
18f196044dSBo Shen #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
19f196044dSBo Shen #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
20f196044dSBo Shen 
21f196044dSBo Shen #define CONFIG_ARCH_CPU_INIT
22f196044dSBo Shen 
23*0b2a9824SBo Shen #ifndef CONFIG_SPL_BUILD
24f196044dSBo Shen #define CONFIG_SKIP_LOWLEVEL_INIT
25*0b2a9824SBo Shen #endif
26f196044dSBo Shen #define CONFIG_BOARD_EARLY_INIT_F
27f196044dSBo Shen #define CONFIG_DISPLAY_CPUINFO
28f196044dSBo Shen 
29f196044dSBo Shen #define CONFIG_CMD_BOOTZ
30f196044dSBo Shen #define CONFIG_OF_LIBFDT		/* Device Tree support */
31f196044dSBo Shen 
32f196044dSBo Shen #define CONFIG_SYS_GENERIC_BOARD
33f196044dSBo Shen 
34f196044dSBo Shen /* general purpose I/O */
35f196044dSBo Shen #define CONFIG_AT91_GPIO
36f196044dSBo Shen 
37f196044dSBo Shen /* serial console */
38f196044dSBo Shen #define CONFIG_ATMEL_USART
39f196044dSBo Shen #define CONFIG_USART_BASE		ATMEL_BASE_USART3
40f196044dSBo Shen #define CONFIG_USART_ID			ATMEL_ID_USART3
41f196044dSBo Shen 
42f196044dSBo Shen #define CONFIG_BOOTDELAY		3
43f196044dSBo Shen 
44f196044dSBo Shen /*
45f196044dSBo Shen  * BOOTP options
46f196044dSBo Shen  */
47f196044dSBo Shen #define CONFIG_BOOTP_BOOTFILESIZE
48f196044dSBo Shen #define CONFIG_BOOTP_BOOTPATH
49f196044dSBo Shen #define CONFIG_BOOTP_GATEWAY
50f196044dSBo Shen #define CONFIG_BOOTP_HOSTNAME
51f196044dSBo Shen 
52f196044dSBo Shen /* No NOR flash */
53f196044dSBo Shen #define CONFIG_SYS_NO_FLASH
54f196044dSBo Shen 
55f196044dSBo Shen /*
56f196044dSBo Shen  * Command line configuration.
57f196044dSBo Shen  */
58f196044dSBo Shen #include <config_cmd_default.h>
59f196044dSBo Shen #undef CONFIG_CMD_FPGA
60f196044dSBo Shen #undef CONFIG_CMD_IMI
61f196044dSBo Shen #undef CONFIG_CMD_LOADS
62f196044dSBo Shen #define CONFIG_CMD_PING
63f196044dSBo Shen #define CONFIG_CMD_DHCP
64f196044dSBo Shen #define CONFIG_CMD_SETEXPR
65f196044dSBo Shen 
66f196044dSBo Shen /* SDRAM */
67f196044dSBo Shen #define CONFIG_NR_DRAM_BANKS		1
68f196044dSBo Shen #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
69f196044dSBo Shen #define CONFIG_SYS_SDRAM_SIZE		0x20000000
70f196044dSBo Shen 
71*0b2a9824SBo Shen #ifdef CONFIG_SPL_BUILD
72*0b2a9824SBo Shen #define CONFIG_SYS_INIT_SP_ADDR		0x210000
73*0b2a9824SBo Shen #else
74f196044dSBo Shen #define CONFIG_SYS_INIT_SP_ADDR \
75f196044dSBo Shen 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
76*0b2a9824SBo Shen #endif
77f196044dSBo Shen 
78f196044dSBo Shen #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
79f196044dSBo Shen 
80f196044dSBo Shen /* SerialFlash */
81f196044dSBo Shen #define CONFIG_CMD_SF
82f196044dSBo Shen 
83f196044dSBo Shen #ifdef CONFIG_CMD_SF
84f196044dSBo Shen #define CONFIG_ATMEL_SPI
85f196044dSBo Shen #define CONFIG_ATMEL_SPI0
86f196044dSBo Shen #define CONFIG_SPI_FLASH
87f196044dSBo Shen #define CONFIG_SPI_FLASH_ATMEL
88f196044dSBo Shen #define CONFIG_SF_DEFAULT_BUS		0
89f196044dSBo Shen #define CONFIG_SF_DEFAULT_CS		0
90f196044dSBo Shen #define CONFIG_SF_DEFAULT_SPEED		30000000
91f196044dSBo Shen #endif
92f196044dSBo Shen 
93f196044dSBo Shen /* NAND flash */
94f196044dSBo Shen #define CONFIG_CMD_NAND
95f196044dSBo Shen 
96f196044dSBo Shen #ifdef CONFIG_CMD_NAND
97f196044dSBo Shen #define CONFIG_NAND_ATMEL
98f196044dSBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE	1
99f196044dSBo Shen #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
100f196044dSBo Shen /* our ALE is AD21 */
101f196044dSBo Shen #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
102f196044dSBo Shen /* our CLE is AD22 */
103f196044dSBo Shen #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
104f196044dSBo Shen #define CONFIG_SYS_NAND_ONFI_DETECTION
105f196044dSBo Shen /* PMECC & PMERRLOC */
106f196044dSBo Shen #define CONFIG_ATMEL_NAND_HWECC
107f196044dSBo Shen #define CONFIG_ATMEL_NAND_HW_PMECC
108f196044dSBo Shen #endif
109f196044dSBo Shen 
110f196044dSBo Shen /* MMC */
111f196044dSBo Shen #define CONFIG_CMD_MMC
112f196044dSBo Shen 
113f196044dSBo Shen #ifdef CONFIG_CMD_MMC
114f196044dSBo Shen #define CONFIG_MMC
115f196044dSBo Shen #define CONFIG_GENERIC_MMC
116f196044dSBo Shen #define CONFIG_GENERIC_ATMEL_MCI
117f196044dSBo Shen #define ATMEL_BASE_MMCI			ATMEL_BASE_MCI1
118f196044dSBo Shen #endif
119f196044dSBo Shen 
120f196044dSBo Shen /* USB */
121f196044dSBo Shen #define CONFIG_CMD_USB
122f196044dSBo Shen 
123f196044dSBo Shen #ifdef CONFIG_CMD_USB
124f196044dSBo Shen #define CONFIG_USB_EHCI
125f196044dSBo Shen #define CONFIG_USB_EHCI_ATMEL
126f196044dSBo Shen #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
127f196044dSBo Shen #define CONFIG_USB_STORAGE
128f196044dSBo Shen #endif
129f196044dSBo Shen 
13052305a82SBo Shen /* USB device */
13152305a82SBo Shen #define CONFIG_USB_GADGET
13252305a82SBo Shen #define CONFIG_USB_GADGET_DUALSPEED
13352305a82SBo Shen #define CONFIG_USB_GADGET_ATMEL_USBA
13452305a82SBo Shen #define CONFIG_USB_ETHER
13552305a82SBo Shen #define CONFIG_USB_ETH_RNDIS
13652305a82SBo Shen #define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D4EK"
13752305a82SBo Shen 
138f196044dSBo Shen #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
139f196044dSBo Shen #define CONFIG_CMD_FAT
140f196044dSBo Shen #define CONFIG_DOS_PARTITION
141f196044dSBo Shen #endif
142f196044dSBo Shen 
143f196044dSBo Shen /* Ethernet Hardware */
144f196044dSBo Shen #define CONFIG_MACB
145f196044dSBo Shen #define CONFIG_RMII
146f196044dSBo Shen #define CONFIG_NET_RETRY_COUNT		20
147f196044dSBo Shen #define CONFIG_MACB_SEARCH_PHY
148f196044dSBo Shen 
149f196044dSBo Shen /* LCD */
150f196044dSBo Shen /* #define CONFIG_LCD */
151f196044dSBo Shen #ifdef CONFIG_LCD
152f196044dSBo Shen #define LCD_BPP				LCD_COLOR16
153f196044dSBo Shen #define LCD_OUTPUT_BPP                  24
154f196044dSBo Shen #define CONFIG_LCD_LOGO
155f196044dSBo Shen #define CONFIG_LCD_INFO
156f196044dSBo Shen #define CONFIG_LCD_INFO_BELOW_LOGO
157f196044dSBo Shen #define CONFIG_SYS_WHITE_ON_BLACK
158f196044dSBo Shen #define CONFIG_ATMEL_HLCD
159f196044dSBo Shen #define CONFIG_ATMEL_LCD_RGB565
160f196044dSBo Shen #define CONFIG_SYS_CONSOLE_IS_IN_ENV
161f196044dSBo Shen #endif
162f196044dSBo Shen 
163f196044dSBo Shen #ifdef CONFIG_SYS_USE_SERIALFLASH
164f196044dSBo Shen /* bootstrap + u-boot + env + linux in serial flash */
165f196044dSBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH
166f196044dSBo Shen #define CONFIG_ENV_SPI_BUS	CONFIG_SF_DEFAULT_BUS
167f196044dSBo Shen #define CONFIG_ENV_SPI_CS	CONFIG_SF_DEFAULT_CS
168f196044dSBo Shen #define CONFIG_ENV_OFFSET       0x10000
169f196044dSBo Shen #define CONFIG_ENV_SIZE         0x10000
170f196044dSBo Shen #define CONFIG_ENV_SECT_SIZE    0x1000
171f196044dSBo Shen #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
172f196044dSBo Shen 				"sf read 0x21000000 0xa0000 0x60000; " \
173f196044dSBo Shen 				"sf read 0x22000000 0x100000 0x300000; " \
174f196044dSBo Shen 				"bootz 0x22000000 - 0x21000000"
175f196044dSBo Shen #elif CONFIG_SYS_USE_NANDFLASH
176f196044dSBo Shen /* bootstrap + u-boot + env in nandflash */
177f196044dSBo Shen #define CONFIG_ENV_IS_IN_NAND
178f196044dSBo Shen #define CONFIG_ENV_OFFSET		0xc0000
179f196044dSBo Shen #define CONFIG_ENV_OFFSET_REDUND	0x100000
180f196044dSBo Shen #define CONFIG_ENV_SIZE			0x20000
181f196044dSBo Shen #define CONFIG_BOOTCOMMAND	"nand read 0x21000000 0x180000 0x80000;" \
182f196044dSBo Shen 				"nand read 0x22000000 0x200000 0x600000;" \
183f196044dSBo Shen 				"bootz 0x22000000 - 0x21000000"
184f196044dSBo Shen #elif CONFIG_SYS_USE_MMC
185f196044dSBo Shen /* bootstrap + u-boot + env in sd card */
186f196044dSBo Shen #define CONFIG_ENV_IS_IN_FAT
187f196044dSBo Shen #define CONFIG_FAT_WRITE
188f196044dSBo Shen #define FAT_ENV_INTERFACE	"mmc"
189f196044dSBo Shen /*
190f196044dSBo Shen  * We don't specify the part number, if device 0 has partition table, it means
191f196044dSBo Shen  * the first partition; it no partition table, then take whole device as a
192f196044dSBo Shen  * FAT file system.
193f196044dSBo Shen  */
194f196044dSBo Shen #define FAT_ENV_DEVICE_AND_PART	"0"
195f196044dSBo Shen #define FAT_ENV_FILE		"uboot.env"
196f196044dSBo Shen #define CONFIG_ENV_SIZE		0x4000
197f196044dSBo Shen #define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 at91-sama5d4_xplained.dtb; " \
198f196044dSBo Shen 				"fatload mmc 0:1 0x22000000 zImage; " \
199f196044dSBo Shen 				"bootz 0x22000000 - 0x21000000"
200f196044dSBo Shen #endif
201f196044dSBo Shen 
202f196044dSBo Shen #ifdef CONFIG_SYS_USE_MMC
203f196044dSBo Shen #define CONFIG_BOOTARGS							\
204f196044dSBo Shen 	"console=ttyS0,115200 earlyprintk "				\
205f196044dSBo Shen 	"root=/dev/mmcblk0p2 rw rootwait"
206f196044dSBo Shen #else
207f196044dSBo Shen #define CONFIG_BOOTARGS							\
208f196044dSBo Shen 	"console=ttyS0,115200 earlyprintk "				\
209f196044dSBo Shen 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
210f196044dSBo Shen 	"256K(env),256k(evn_redundent),256k(spare),"			\
211f196044dSBo Shen 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
212f196044dSBo Shen 	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
213f196044dSBo Shen #endif
214f196044dSBo Shen 
215f196044dSBo Shen #define CONFIG_BAUDRATE			115200
216f196044dSBo Shen 
217f196044dSBo Shen #define CONFIG_SYS_PROMPT		"U-Boot> "
218f196044dSBo Shen #define CONFIG_SYS_CBSIZE		256
219f196044dSBo Shen #define CONFIG_SYS_MAXARGS		16
220f196044dSBo Shen #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
221f196044dSBo Shen 					sizeof(CONFIG_SYS_PROMPT) + 16)
222f196044dSBo Shen #define CONFIG_SYS_LONGHELP
223f196044dSBo Shen #define CONFIG_CMDLINE_EDITING
224f196044dSBo Shen #define CONFIG_AUTO_COMPLETE
225f196044dSBo Shen #define CONFIG_SYS_HUSH_PARSER
226f196044dSBo Shen 
227f196044dSBo Shen /* Size of malloc() pool */
228f196044dSBo Shen #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
229f196044dSBo Shen 
230*0b2a9824SBo Shen 
231*0b2a9824SBo Shen /* SPL */
232*0b2a9824SBo Shen #define CONFIG_SPL_FRAMEWORK
233*0b2a9824SBo Shen #define CONFIG_SPL_TEXT_BASE		0x200000
234*0b2a9824SBo Shen #define CONFIG_SPL_MAX_SIZE		0x10000
235*0b2a9824SBo Shen #define CONFIG_SPL_BSS_START_ADDR	0x20000000
236*0b2a9824SBo Shen #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
237*0b2a9824SBo Shen #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
238*0b2a9824SBo Shen #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
239*0b2a9824SBo Shen 
240*0b2a9824SBo Shen #define CONFIG_SPL_LIBCOMMON_SUPPORT
241*0b2a9824SBo Shen #define CONFIG_SPL_LIBGENERIC_SUPPORT
242*0b2a9824SBo Shen #define CONFIG_SPL_GPIO_SUPPORT
243*0b2a9824SBo Shen #define CONFIG_SPL_SERIAL_SUPPORT
244*0b2a9824SBo Shen 
245*0b2a9824SBo Shen #define CONFIG_SPL_BOARD_INIT
246*0b2a9824SBo Shen #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
247*0b2a9824SBo Shen 
248*0b2a9824SBo Shen #ifdef CONFIG_SYS_USE_MMC
249*0b2a9824SBo Shen #define CONFIG_SPL_LDSCRIPT		arch/arm/cpu/at91-common/u-boot-spl.lds
250*0b2a9824SBo Shen #define CONFIG_SPL_MMC_SUPPORT
251*0b2a9824SBo Shen #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
252*0b2a9824SBo Shen #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
253*0b2a9824SBo Shen #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
254*0b2a9824SBo Shen #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
255*0b2a9824SBo Shen #define CONFIG_SPL_FAT_SUPPORT
256*0b2a9824SBo Shen #define CONFIG_SPL_LIBDISK_SUPPORT
257*0b2a9824SBo Shen 
258*0b2a9824SBo Shen #elif CONFIG_SYS_USE_NANDFLASH
259*0b2a9824SBo Shen #define CONFIG_SPL_NAND_SUPPORT
260*0b2a9824SBo Shen #define CONFIG_SPL_NAND_DRIVERS
261*0b2a9824SBo Shen #define CONFIG_SPL_NAND_BASE
262*0b2a9824SBo Shen #define CONFIG_PMECC_CAP		8
263*0b2a9824SBo Shen #define CONFIG_PMECC_SECTOR_SIZE	512
264*0b2a9824SBo Shen #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
265*0b2a9824SBo Shen #define CONFIG_SYS_NAND_5_ADDR_CYCLE
266*0b2a9824SBo Shen #define CONFIG_SYS_NAND_PAGE_SIZE	0x1000
267*0b2a9824SBo Shen #define CONFIG_SYS_NAND_PAGE_COUNT	64
268*0b2a9824SBo Shen #define CONFIG_SYS_NAND_OOBSIZE		224
269*0b2a9824SBo Shen #define CONFIG_SYS_NAND_BLOCK_SIZE	0x40000
270*0b2a9824SBo Shen #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
271*0b2a9824SBo Shen #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
272*0b2a9824SBo Shen 
273*0b2a9824SBo Shen #elif CONFIG_SYS_USE_SERIALFLASH
274*0b2a9824SBo Shen #define CONFIG_SPL_SPI_SUPPORT
275*0b2a9824SBo Shen #define CONFIG_SPL_SPI_FLASH_SUPPORT
276*0b2a9824SBo Shen #define CONFIG_SPL_SPI_LOAD
277*0b2a9824SBo Shen #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
278*0b2a9824SBo Shen 
279*0b2a9824SBo Shen #endif
280f196044dSBo Shen #endif
281