xref: /rk3399_rockchip-uboot/include/configs/sama5d3xek.h (revision 78d1e1d0a157c8b48ea19be6170b992745d30f38)
1 /*
2  * Configuation settings for the SAMA5D3xEK board.
3  *
4  * Copyright (C) 2012 - 2013 Atmel
5  *
6  * based on at91sam9m10g45ek.h by:
7  * Stelian Pop <stelian@popies.net>
8  * Lead Tech Design <www.leadtechdesign.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15 
16 /*
17  * If has No NOR flash, please put the definition: CONFIG_SYS_NO_FLASH
18  * before the common header.
19  */
20 #include "at91-sama5_common.h"
21 
22 #define CONFIG_BOARD_LATE_INIT
23 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
24 
25 /* serial console */
26 #define CONFIG_ATMEL_USART
27 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
28 #define	CONFIG_USART_ID			ATMEL_ID_DBGU
29 
30 /*
31  * This needs to be defined for the OHCI code to work but it is defined as
32  * ATMEL_ID_UHPHS in the CPU specific header files.
33  */
34 #define ATMEL_ID_UHP			ATMEL_ID_UHPHS
35 
36 /*
37  * Specify the clock enable bit in the PMC_SCER register.
38  */
39 #define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
40 
41 /* LCD */
42 #define CONFIG_LCD
43 #define LCD_BPP				LCD_COLOR16
44 #define LCD_OUTPUT_BPP                  24
45 #define CONFIG_LCD_LOGO
46 #define CONFIG_LCD_INFO
47 #define CONFIG_LCD_INFO_BELOW_LOGO
48 #define CONFIG_SYS_WHITE_ON_BLACK
49 #define CONFIG_ATMEL_HLCD
50 #define CONFIG_ATMEL_LCD_RGB565
51 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
52 
53 /* board specific (not enough SRAM) */
54 #define CONFIG_SAMA5D3_LCD_BASE		0x23E00000
55 
56 /* NOR flash */
57 #ifndef CONFIG_SYS_NO_FLASH
58 #define CONFIG_FLASH_CFI_DRIVER
59 #define CONFIG_SYS_FLASH_CFI
60 #define CONFIG_SYS_FLASH_PROTECTION
61 #define CONFIG_SYS_FLASH_BASE		0x10000000
62 #define CONFIG_SYS_MAX_FLASH_SECT	131
63 #define CONFIG_SYS_MAX_FLASH_BANKS	1
64 #endif
65 
66 /* SDRAM */
67 #define CONFIG_NR_DRAM_BANKS		1
68 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
69 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
70 
71 #ifdef CONFIG_SPL_BUILD
72 #define CONFIG_SYS_INIT_SP_ADDR		0x310000
73 #else
74 #define CONFIG_SYS_INIT_SP_ADDR \
75 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
76 #endif
77 
78 /* SerialFlash */
79 
80 #ifdef CONFIG_CMD_SF
81 #define CONFIG_ATMEL_SPI
82 #define CONFIG_SF_DEFAULT_SPEED		30000000
83 #endif
84 
85 /* NAND flash */
86 #define CONFIG_CMD_NAND
87 
88 #ifdef CONFIG_CMD_NAND
89 #define CONFIG_NAND_ATMEL
90 #define CONFIG_SYS_MAX_NAND_DEVICE	1
91 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
92 /* our ALE is AD21 */
93 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
94 /* our CLE is AD22 */
95 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
96 #define CONFIG_SYS_NAND_ONFI_DETECTION
97 /* PMECC & PMERRLOC */
98 #define CONFIG_ATMEL_NAND_HWECC
99 #define CONFIG_ATMEL_NAND_HW_PMECC
100 #define CONFIG_PMECC_CAP		4
101 #define CONFIG_PMECC_SECTOR_SIZE	512
102 #define CONFIG_CMD_NAND_TRIMFFS
103 #endif
104 
105 /* Ethernet Hardware */
106 #define CONFIG_MACB
107 #define CONFIG_RMII
108 #define CONFIG_NET_RETRY_COUNT		20
109 #define CONFIG_MACB_SEARCH_PHY
110 #define CONFIG_RGMII
111 #define CONFIG_CMD_MII
112 #define CONFIG_PHYLIB
113 #define CONFIG_PHY_MICREL
114 #define CONFIG_PHY_MICREL_KSZ9021
115 
116 /* MMC */
117 #define CONFIG_CMD_MMC
118 
119 #ifdef CONFIG_CMD_MMC
120 #define CONFIG_MMC
121 #define CONFIG_GENERIC_MMC
122 #define CONFIG_GENERIC_ATMEL_MCI
123 #define ATMEL_BASE_MMCI			ATMEL_BASE_MCI0
124 #endif
125 
126 /* USB */
127 
128 #ifdef CONFIG_CMD_USB
129 #define CONFIG_USB_ATMEL
130 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
131 #define CONFIG_USB_OHCI_NEW
132 #define CONFIG_SYS_USB_OHCI_CPU_INIT
133 #define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
134 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"sama5d3"
135 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
136 #define CONFIG_DOS_PARTITION
137 #define CONFIG_USB_STORAGE
138 #endif
139 
140 /* USB device */
141 #define CONFIG_USB_ETHER
142 #define CONFIG_USB_ETH_RNDIS
143 #define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D3xEK"
144 
145 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
146 #define CONFIG_CMD_FAT
147 #define CONFIG_FAT_WRITE
148 #endif
149 
150 #define CONFIG_SYS_LOAD_ADDR			0x22000000 /* load address */
151 
152 #ifdef CONFIG_SYS_USE_SERIALFLASH
153 /* override the bootcmd, bootargs and other configuration for spi flash env*/
154 #elif CONFIG_SYS_USE_NANDFLASH
155 /* override the bootcmd, bootargs and other configuration nandflash env */
156 #elif CONFIG_SYS_USE_MMC
157 /* override the bootcmd, bootargs and other configuration for sd/mmc env */
158 #else
159 #define CONFIG_ENV_IS_NOWHERE
160 #endif
161 
162 /* SPL */
163 #define CONFIG_SPL_FRAMEWORK
164 #define CONFIG_SPL_TEXT_BASE		0x300000
165 #define CONFIG_SPL_MAX_SIZE		0x10000
166 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
167 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
168 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
169 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
170 
171 #define CONFIG_SPL_LIBCOMMON_SUPPORT
172 #define CONFIG_SPL_LIBGENERIC_SUPPORT
173 #define CONFIG_SPL_GPIO_SUPPORT
174 #define CONFIG_SPL_SERIAL_SUPPORT
175 
176 #define CONFIG_SPL_BOARD_INIT
177 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
178 
179 #ifdef CONFIG_SYS_USE_MMC
180 #define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/armv7/u-boot-spl.lds
181 #define CONFIG_SPL_MMC_SUPPORT
182 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
183 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
184 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
185 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
186 #define CONFIG_SPL_FAT_SUPPORT
187 #define CONFIG_SPL_LIBDISK_SUPPORT
188 
189 #elif CONFIG_SYS_USE_NANDFLASH
190 #define CONFIG_SPL_NAND_SUPPORT
191 #define CONFIG_SPL_NAND_DRIVERS
192 #define CONFIG_SPL_NAND_BASE
193 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
194 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
195 #define CONFIG_SYS_NAND_PAGE_SIZE	0x800
196 #define CONFIG_SYS_NAND_PAGE_COUNT	64
197 #define CONFIG_SYS_NAND_OOBSIZE		64
198 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
199 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
200 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
201 
202 #elif CONFIG_SYS_USE_SERIALFLASH
203 #define CONFIG_SPL_SPI_SUPPORT
204 #define CONFIG_SPL_SPI_FLASH_SUPPORT
205 #define CONFIG_SPL_SPI_LOAD
206 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
207 
208 #endif
209 
210 #endif
211