1 /* 2 * Configuation settings for the SAMA5D3xEK board. 3 * 4 * Copyright (C) 2012 - 2013 Atmel 5 * 6 * based on at91sam9m10g45ek.h by: 7 * Stelian Pop <stelian@popies.net> 8 * Lead Tech Design <www.leadtechdesign.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/hardware.h> 17 18 #define CONFIG_SYS_TEXT_BASE 0x26f00000 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 22 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 23 24 #define CONFIG_AT91FAMILY 25 #define CONFIG_ARCH_CPU_INIT 26 27 #ifndef CONFIG_SPL_BUILD 28 #define CONFIG_SKIP_LOWLEVEL_INIT 29 #endif 30 31 #define CONFIG_BOARD_EARLY_INIT_F 32 #define CONFIG_DISPLAY_CPUINFO 33 34 #define CONFIG_CMD_BOOTZ 35 #define CONFIG_OF_LIBFDT /* Device Tree support */ 36 37 #define CONFIG_SYS_GENERIC_BOARD 38 39 /* general purpose I/O */ 40 #define CONFIG_AT91_GPIO 41 42 /* serial console */ 43 #define CONFIG_ATMEL_USART 44 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 45 #define CONFIG_USART_ID ATMEL_ID_DBGU 46 47 /* 48 * This needs to be defined for the OHCI code to work but it is defined as 49 * ATMEL_ID_UHPHS in the CPU specific header files. 50 */ 51 #define ATMEL_ID_UHP ATMEL_ID_UHPHS 52 53 /* 54 * Specify the clock enable bit in the PMC_SCER register. 55 */ 56 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 57 58 /* LCD */ 59 #define CONFIG_LCD 60 #define LCD_BPP LCD_COLOR16 61 #define LCD_OUTPUT_BPP 24 62 #define CONFIG_LCD_LOGO 63 #define CONFIG_LCD_INFO 64 #define CONFIG_LCD_INFO_BELOW_LOGO 65 #define CONFIG_SYS_WHITE_ON_BLACK 66 #define CONFIG_ATMEL_HLCD 67 #define CONFIG_ATMEL_LCD_RGB565 68 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 69 70 /* board specific (not enough SRAM) */ 71 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000 72 73 #define CONFIG_BOOTDELAY 3 74 75 /* 76 * BOOTP options 77 */ 78 #define CONFIG_BOOTP_BOOTFILESIZE 79 #define CONFIG_BOOTP_BOOTPATH 80 #define CONFIG_BOOTP_GATEWAY 81 #define CONFIG_BOOTP_HOSTNAME 82 83 /* No NOR flash */ 84 #define CONFIG_SYS_NO_FLASH 85 86 /* 87 * Command line configuration. 88 */ 89 #include <config_cmd_default.h> 90 #undef CONFIG_CMD_FPGA 91 #undef CONFIG_CMD_IMI 92 #undef CONFIG_CMD_LOADS 93 #define CONFIG_CMD_PING 94 #define CONFIG_CMD_DHCP 95 96 /* SDRAM */ 97 #define CONFIG_NR_DRAM_BANKS 1 98 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 99 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 100 101 #ifdef CONFIG_SPL_BUILD 102 #define CONFIG_SYS_INIT_SP_ADDR 0x310000 103 #else 104 #define CONFIG_SYS_INIT_SP_ADDR \ 105 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 106 #endif 107 108 /* SerialFlash */ 109 #define CONFIG_CMD_SF 110 111 #ifdef CONFIG_CMD_SF 112 #define CONFIG_ATMEL_SPI 113 #define CONFIG_SPI_FLASH 114 #define CONFIG_SPI_FLASH_ATMEL 115 #define CONFIG_SF_DEFAULT_SPEED 30000000 116 #endif 117 118 /* NAND flash */ 119 #define CONFIG_CMD_NAND 120 121 #ifdef CONFIG_CMD_NAND 122 #define CONFIG_NAND_ATMEL 123 #define CONFIG_SYS_MAX_NAND_DEVICE 1 124 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 125 /* our ALE is AD21 */ 126 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 127 /* our CLE is AD22 */ 128 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 129 #define CONFIG_SYS_NAND_ONFI_DETECTION 130 /* PMECC & PMERRLOC */ 131 #define CONFIG_ATMEL_NAND_HWECC 132 #define CONFIG_ATMEL_NAND_HW_PMECC 133 #define CONFIG_PMECC_CAP 4 134 #define CONFIG_PMECC_SECTOR_SIZE 512 135 #define CONFIG_CMD_NAND_TRIMFFS 136 #endif 137 138 /* Ethernet Hardware */ 139 #define CONFIG_MACB 140 #define CONFIG_RMII 141 #define CONFIG_NET_RETRY_COUNT 20 142 #define CONFIG_MACB_SEARCH_PHY 143 #define CONFIG_RGMII 144 #define CONFIG_CMD_MII 145 #define CONFIG_PHYLIB 146 #define CONFIG_PHY_MICREL 147 #define CONFIG_PHY_MICREL_KSZ9021 148 149 /* MMC */ 150 #define CONFIG_CMD_MMC 151 152 #ifdef CONFIG_CMD_MMC 153 #define CONFIG_MMC 154 #define CONFIG_GENERIC_MMC 155 #define CONFIG_GENERIC_ATMEL_MCI 156 #define ATMEL_BASE_MMCI ATMEL_BASE_MCI0 157 #endif 158 159 /* USB */ 160 #define CONFIG_CMD_USB 161 162 #ifdef CONFIG_CMD_USB 163 #define CONFIG_USB_ATMEL 164 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 165 #define CONFIG_USB_OHCI_NEW 166 #define CONFIG_SYS_USB_OHCI_CPU_INIT 167 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 168 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3" 169 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 170 #define CONFIG_DOS_PARTITION 171 #define CONFIG_USB_STORAGE 172 #endif 173 174 /* USB device */ 175 #define CONFIG_USB_GADGET 176 #define CONFIG_USB_GADGET_DUALSPEED 177 #define CONFIG_USB_GADGET_ATMEL_USBA 178 #define CONFIG_USB_ETHER 179 #define CONFIG_USB_ETH_RNDIS 180 #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK" 181 182 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 183 #define CONFIG_CMD_FAT 184 #endif 185 186 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 187 188 #ifdef CONFIG_SYS_USE_SERIALFLASH 189 /* bootstrap + u-boot + env + linux in serial flash */ 190 #define CONFIG_ENV_IS_IN_SPI_FLASH 191 #define CONFIG_ENV_OFFSET 0x5000 192 #define CONFIG_ENV_SIZE 0x3000 193 #define CONFIG_ENV_SECT_SIZE 0x1000 194 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 195 "sf read 0x22000000 0x42000 0x300000; " \ 196 "bootm 0x22000000" 197 #elif CONFIG_SYS_USE_NANDFLASH 198 /* bootstrap + u-boot + env in nandflash */ 199 #define CONFIG_ENV_IS_IN_NAND 200 #define CONFIG_ENV_OFFSET 0xc0000 201 #define CONFIG_ENV_OFFSET_REDUND 0x100000 202 #define CONFIG_ENV_SIZE 0x20000 203 #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \ 204 "nand read 0x22000000 0x200000 0x600000;" \ 205 "bootm 0x22000000 - 0x21000000" 206 #elif CONFIG_SYS_USE_MMC 207 /* bootstrap + u-boot + env in sd card */ 208 #define CONFIG_ENV_IS_IN_MMC 209 #define CONFIG_ENV_OFFSET 0x2000 210 #define CONFIG_ENV_SIZE 0x1000 211 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \ 212 "fatload mmc 0:1 0x22000000 uImage; " \ 213 "bootm 0x22000000 - 0x21000000" 214 #define CONFIG_SYS_MMC_ENV_DEV 0 215 #else 216 #define CONFIG_ENV_IS_NOWHERE 217 #endif 218 219 #ifdef CONFIG_SYS_USE_MMC 220 #define CONFIG_BOOTARGS \ 221 "console=ttyS0,115200 earlyprintk " \ 222 "root=/dev/mmcblk0p2 rw rootwait" 223 #else 224 #define CONFIG_BOOTARGS \ 225 "console=ttyS0,115200 earlyprintk " \ 226 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 227 "256K(env),256k(evn_redundent),256k(spare)," \ 228 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 229 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" 230 #endif 231 232 #define CONFIG_BAUDRATE 115200 233 234 #define CONFIG_SYS_PROMPT "U-Boot> " 235 #define CONFIG_SYS_CBSIZE 256 236 #define CONFIG_SYS_MAXARGS 16 237 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 238 sizeof(CONFIG_SYS_PROMPT) + 16) 239 #define CONFIG_SYS_LONGHELP 240 #define CONFIG_CMDLINE_EDITING 241 #define CONFIG_AUTO_COMPLETE 242 #define CONFIG_SYS_HUSH_PARSER 243 244 /* Size of malloc() pool */ 245 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) 246 247 /* SPL */ 248 #define CONFIG_SPL 249 #define CONFIG_SPL_FRAMEWORK 250 #define CONFIG_SPL_TEXT_BASE 0x300000 251 #define CONFIG_SPL_MAX_SIZE 0x10000 252 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 253 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 254 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 255 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 256 257 #define CONFIG_SPL_LIBCOMMON_SUPPORT 258 #define CONFIG_SPL_LIBGENERIC_SUPPORT 259 #define CONFIG_SPL_GPIO_SUPPORT 260 #define CONFIG_SPL_SERIAL_SUPPORT 261 262 #define CONFIG_SPL_BOARD_INIT 263 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 264 265 #ifdef CONFIG_SYS_USE_MMC 266 #define CONFIG_SPL_LDSCRIPT arch/arm/cpu/at91-common/u-boot-spl.lds 267 #define CONFIG_SPL_MMC_SUPPORT 268 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 269 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 270 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 271 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 272 #define CONFIG_SPL_FAT_SUPPORT 273 #define CONFIG_SPL_LIBDISK_SUPPORT 274 275 #elif CONFIG_SYS_USE_NANDFLASH 276 #define CONFIG_SPL_NAND_SUPPORT 277 #define CONFIG_SPL_NAND_DRIVERS 278 #define CONFIG_SPL_NAND_BASE 279 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 280 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 281 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 282 #define CONFIG_SYS_NAND_PAGE_COUNT 64 283 #define CONFIG_SYS_NAND_OOBSIZE 64 284 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 285 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 286 287 #elif CONFIG_SYS_USE_SERIALFLASH 288 #define CONFIG_SPL_SPI_SUPPORT 289 #define CONFIG_SPL_SPI_FLASH_SUPPORT 290 #define CONFIG_SPL_SPI_LOAD 291 #define CONFIG_SPL_SPI_BUS 0 292 #define CONFIG_SPL_SPI_CS 0 293 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 294 295 #endif 296 297 #endif 298