xref: /rk3399_rockchip-uboot/include/configs/sama5d3_xplained.h (revision dc018fef2fd11555d6492a242256da68d07c8ef2)
17ca6f363SBo Shen /*
27ca6f363SBo Shen  * Configuration settings for the SAMA5D3 Xplained board.
37ca6f363SBo Shen  *
47ca6f363SBo Shen  * Copyright (C) 2014 Atmel Corporation
57ca6f363SBo Shen  *		      Bo Shen <voice.shen@atmel.com>
67ca6f363SBo Shen  *
77ca6f363SBo Shen  * SPDX-License-Identifier:	GPL-2.0+
87ca6f363SBo Shen  */
97ca6f363SBo Shen 
107ca6f363SBo Shen #ifndef __CONFIG_H
117ca6f363SBo Shen #define __CONFIG_H
127ca6f363SBo Shen 
13b2d387bcSWu, Josh /* No NOR flash, this definition should put before common header */
14b2d387bcSWu, Josh #define CONFIG_SYS_NO_FLASH
157ca6f363SBo Shen 
16b2d387bcSWu, Josh #include "at91-sama5_common.h"
177ca6f363SBo Shen 
187ca6f363SBo Shen /* serial console */
197ca6f363SBo Shen #define CONFIG_ATMEL_USART
207ca6f363SBo Shen #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
217ca6f363SBo Shen #define CONFIG_USART_ID			ATMEL_ID_DBGU
227ca6f363SBo Shen 
237ca6f363SBo Shen /*
247ca6f363SBo Shen  * This needs to be defined for the OHCI code to work but it is defined as
257ca6f363SBo Shen  * ATMEL_ID_UHPHS in the CPU specific header files.
267ca6f363SBo Shen  */
277ca6f363SBo Shen #define ATMEL_ID_UHP			ATMEL_ID_UHPHS
287ca6f363SBo Shen 
297ca6f363SBo Shen /*
307ca6f363SBo Shen  * Specify the clock enable bit in the PMC_SCER register.
317ca6f363SBo Shen  */
327ca6f363SBo Shen #define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
337ca6f363SBo Shen 
347ca6f363SBo Shen /* SDRAM */
357ca6f363SBo Shen #define CONFIG_NR_DRAM_BANKS		1
367ca6f363SBo Shen #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
377ca6f363SBo Shen #define CONFIG_SYS_SDRAM_SIZE		0x10000000
387ca6f363SBo Shen 
39cd23aac4SBo Shen #ifdef CONFIG_SPL_BUILD
40cd23aac4SBo Shen #define CONFIG_SYS_INIT_SP_ADDR		0x310000
41cd23aac4SBo Shen #else
427ca6f363SBo Shen #define CONFIG_SYS_INIT_SP_ADDR \
437ca6f363SBo Shen 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
44cd23aac4SBo Shen #endif
457ca6f363SBo Shen 
467ca6f363SBo Shen /* NAND flash */
477ca6f363SBo Shen #define CONFIG_CMD_NAND
487ca6f363SBo Shen 
497ca6f363SBo Shen #ifdef CONFIG_CMD_NAND
507ca6f363SBo Shen #define CONFIG_NAND_ATMEL
517ca6f363SBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE	1
527ca6f363SBo Shen #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
537ca6f363SBo Shen /* our ALE is AD21 */
547ca6f363SBo Shen #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
557ca6f363SBo Shen /* our CLE is AD22 */
567ca6f363SBo Shen #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
577ca6f363SBo Shen #define CONFIG_SYS_NAND_ONFI_DETECTION
587ca6f363SBo Shen /* PMECC & PMERRLOC */
597ca6f363SBo Shen #define CONFIG_ATMEL_NAND_HWECC
607ca6f363SBo Shen #define CONFIG_ATMEL_NAND_HW_PMECC
617ca6f363SBo Shen #define CONFIG_PMECC_CAP		4
627ca6f363SBo Shen #define CONFIG_PMECC_SECTOR_SIZE	512
637ca6f363SBo Shen #define CONFIG_CMD_NAND_TRIMFFS
647ca6f363SBo Shen #define CONFIG_CMD_MTDPARTS
657ca6f363SBo Shen 
667ca6f363SBo Shen #define CONFIG_MTD_DEVICE
677ca6f363SBo Shen #define CONFIG_MTD_PARTITIONS
687ca6f363SBo Shen #define CONFIG_RBTREE
697ca6f363SBo Shen #define CONFIG_LZO
707ca6f363SBo Shen #define CONFIG_CMD_UBI
717ca6f363SBo Shen #define CONFIG_CMD_UBIFS
727ca6f363SBo Shen #endif
737ca6f363SBo Shen 
747ca6f363SBo Shen /* Ethernet Hardware */
757ca6f363SBo Shen #define CONFIG_MACB
767ca6f363SBo Shen #define CONFIG_RMII
777ca6f363SBo Shen #define CONFIG_NET_RETRY_COUNT		20
787ca6f363SBo Shen #define CONFIG_MACB_SEARCH_PHY
797ca6f363SBo Shen #define CONFIG_RGMII
807ca6f363SBo Shen #define CONFIG_CMD_MII
817ca6f363SBo Shen #define CONFIG_PHYLIB
827ca6f363SBo Shen 
837ca6f363SBo Shen /* MMC */
847ca6f363SBo Shen #define CONFIG_CMD_MMC
857ca6f363SBo Shen 
867ca6f363SBo Shen #ifdef CONFIG_CMD_MMC
877ca6f363SBo Shen #define CONFIG_MMC
887ca6f363SBo Shen #define CONFIG_GENERIC_MMC
897ca6f363SBo Shen #define CONFIG_GENERIC_ATMEL_MCI
907ca6f363SBo Shen #define CONFIG_ATMEL_MCI_8BIT
917ca6f363SBo Shen #endif
927ca6f363SBo Shen 
937ca6f363SBo Shen /* USB */
947ca6f363SBo Shen #define CONFIG_CMD_USB
957ca6f363SBo Shen 
967ca6f363SBo Shen #ifdef CONFIG_CMD_USB
977ca6f363SBo Shen #define CONFIG_USB_ATMEL
987ca6f363SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
997ca6f363SBo Shen #define CONFIG_USB_OHCI_NEW
1007ca6f363SBo Shen #define CONFIG_SYS_USB_OHCI_CPU_INIT
1017ca6f363SBo Shen #define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
1027ca6f363SBo Shen #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"SAMA5D3 Xplained"
1037ca6f363SBo Shen #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
1047ca6f363SBo Shen #define CONFIG_DOS_PARTITION
1057ca6f363SBo Shen #define CONFIG_USB_STORAGE
1067ca6f363SBo Shen #endif
1077ca6f363SBo Shen 
1087ca6f363SBo Shen #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
1097ca6f363SBo Shen #define CONFIG_CMD_FAT
1107ca6f363SBo Shen #define CONFIG_FAT_WRITE
1117ca6f363SBo Shen #define CONFIG_CMD_EXT4
1127ca6f363SBo Shen #define CONFIG_CMD_EXT4_WRITE
1137ca6f363SBo Shen #endif
1147ca6f363SBo Shen 
1157ca6f363SBo Shen #define CONFIG_SYS_LOAD_ADDR			0x22000000 /* load address */
1167ca6f363SBo Shen 
1177ca6f363SBo Shen #if CONFIG_SYS_USE_NANDFLASH
118*dc018fefSWu, Josh /* override the bootcmd, bootargs and other configuration for nandflash env */
1197ca6f363SBo Shen #elif CONFIG_SYS_USE_MMC
120372ca03fSWu, Josh /* override the bootcmd, bootargs and other configuration for sd/mmc env */
1217ca6f363SBo Shen #else
1227ca6f363SBo Shen #define CONFIG_ENV_IS_NOWHERE
1237ca6f363SBo Shen #endif
1247ca6f363SBo Shen 
125cd23aac4SBo Shen /* SPL */
126cd23aac4SBo Shen #define CONFIG_SPL_FRAMEWORK
127cd23aac4SBo Shen #define CONFIG_SPL_TEXT_BASE		0x300000
128cd23aac4SBo Shen #define CONFIG_SPL_MAX_SIZE		0x10000
129cd23aac4SBo Shen #define CONFIG_SPL_BSS_START_ADDR	0x20000000
130cd23aac4SBo Shen #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
131cd23aac4SBo Shen #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
132cd23aac4SBo Shen #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
133cd23aac4SBo Shen 
134cd23aac4SBo Shen #define CONFIG_SPL_LIBCOMMON_SUPPORT
135cd23aac4SBo Shen #define CONFIG_SPL_LIBGENERIC_SUPPORT
136cd23aac4SBo Shen #define CONFIG_SPL_GPIO_SUPPORT
137cd23aac4SBo Shen #define CONFIG_SPL_SERIAL_SUPPORT
138cd23aac4SBo Shen 
139cd23aac4SBo Shen #define CONFIG_SPL_BOARD_INIT
140cd23aac4SBo Shen #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
141cd23aac4SBo Shen 
142cd23aac4SBo Shen #ifdef CONFIG_SYS_USE_MMC
143993ea97eSBo Shen #define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/armv7/u-boot-spl.lds
144cd23aac4SBo Shen #define CONFIG_SPL_MMC_SUPPORT
145cd23aac4SBo Shen #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
146cd23aac4SBo Shen #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
147e2ccdf89SPaul Kocialkowski #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
148205b4f33SGuillaume GARDET #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
149cd23aac4SBo Shen #define CONFIG_SPL_FAT_SUPPORT
150cd23aac4SBo Shen #define CONFIG_SPL_LIBDISK_SUPPORT
151cd23aac4SBo Shen 
152cd23aac4SBo Shen #elif CONFIG_SYS_USE_NANDFLASH
153cd23aac4SBo Shen #define CONFIG_SPL_NAND_SUPPORT
154cd23aac4SBo Shen #define CONFIG_SPL_NAND_DRIVERS
155cd23aac4SBo Shen #define CONFIG_SPL_NAND_BASE
156cd23aac4SBo Shen #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
157cd23aac4SBo Shen #define CONFIG_SYS_NAND_5_ADDR_CYCLE
158cd23aac4SBo Shen #define CONFIG_SYS_NAND_PAGE_SIZE	0x800
159cd23aac4SBo Shen #define CONFIG_SYS_NAND_PAGE_COUNT	64
160cd23aac4SBo Shen #define CONFIG_SYS_NAND_OOBSIZE		64
161cd23aac4SBo Shen #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
162cd23aac4SBo Shen #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
16305a4d544SWu, Josh #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
164cd23aac4SBo Shen 
165cd23aac4SBo Shen #endif
166cd23aac4SBo Shen 
1677ca6f363SBo Shen #endif
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