17ca6f363SBo Shen /* 27ca6f363SBo Shen * Configuration settings for the SAMA5D3 Xplained board. 37ca6f363SBo Shen * 47ca6f363SBo Shen * Copyright (C) 2014 Atmel Corporation 57ca6f363SBo Shen * Bo Shen <voice.shen@atmel.com> 67ca6f363SBo Shen * 77ca6f363SBo Shen * SPDX-License-Identifier: GPL-2.0+ 87ca6f363SBo Shen */ 97ca6f363SBo Shen 107ca6f363SBo Shen #ifndef __CONFIG_H 117ca6f363SBo Shen #define __CONFIG_H 127ca6f363SBo Shen 137ca6f363SBo Shen #include <asm/hardware.h> 147ca6f363SBo Shen 157ca6f363SBo Shen #define CONFIG_SYS_TEXT_BASE 0x26f00000 167ca6f363SBo Shen 177ca6f363SBo Shen /* ARM asynchronous clock */ 187ca6f363SBo Shen #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 197ca6f363SBo Shen #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 207ca6f363SBo Shen 217ca6f363SBo Shen #define CONFIG_ARCH_CPU_INIT 22cd23aac4SBo Shen 23cd23aac4SBo Shen #ifndef CONFIG_SPL_BUILD 247ca6f363SBo Shen #define CONFIG_SKIP_LOWLEVEL_INIT 25cd23aac4SBo Shen #endif 26cd23aac4SBo Shen 277ca6f363SBo Shen #define CONFIG_BOARD_EARLY_INIT_F 287ca6f363SBo Shen #define CONFIG_DISPLAY_CPUINFO 297ca6f363SBo Shen 307ca6f363SBo Shen #define CONFIG_CMD_BOOTZ 317ca6f363SBo Shen #define CONFIG_OF_LIBFDT /* Device Tree support */ 327ca6f363SBo Shen 339652296eSBo Shen #define CONFIG_SYS_GENERIC_BOARD 349652296eSBo Shen 357ca6f363SBo Shen /* general purpose I/O */ 367ca6f363SBo Shen #define CONFIG_AT91_GPIO 377ca6f363SBo Shen 387ca6f363SBo Shen /* serial console */ 397ca6f363SBo Shen #define CONFIG_ATMEL_USART 407ca6f363SBo Shen #define CONFIG_USART_BASE ATMEL_BASE_DBGU 417ca6f363SBo Shen #define CONFIG_USART_ID ATMEL_ID_DBGU 427ca6f363SBo Shen 437ca6f363SBo Shen /* 447ca6f363SBo Shen * This needs to be defined for the OHCI code to work but it is defined as 457ca6f363SBo Shen * ATMEL_ID_UHPHS in the CPU specific header files. 467ca6f363SBo Shen */ 477ca6f363SBo Shen #define ATMEL_ID_UHP ATMEL_ID_UHPHS 487ca6f363SBo Shen 497ca6f363SBo Shen /* 507ca6f363SBo Shen * Specify the clock enable bit in the PMC_SCER register. 517ca6f363SBo Shen */ 527ca6f363SBo Shen #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 537ca6f363SBo Shen 547ca6f363SBo Shen #define CONFIG_BOOTDELAY 3 557ca6f363SBo Shen 567ca6f363SBo Shen /* 577ca6f363SBo Shen * BOOTP options 587ca6f363SBo Shen */ 597ca6f363SBo Shen #define CONFIG_BOOTP_BOOTFILESIZE 607ca6f363SBo Shen #define CONFIG_BOOTP_BOOTPATH 617ca6f363SBo Shen #define CONFIG_BOOTP_GATEWAY 627ca6f363SBo Shen #define CONFIG_BOOTP_HOSTNAME 637ca6f363SBo Shen 647ca6f363SBo Shen /* No NOR flash */ 657ca6f363SBo Shen #define CONFIG_SYS_NO_FLASH 667ca6f363SBo Shen 677ca6f363SBo Shen /* 687ca6f363SBo Shen * Command line configuration. 697ca6f363SBo Shen */ 707ca6f363SBo Shen #include <config_cmd_default.h> 717ca6f363SBo Shen #undef CONFIG_CMD_FPGA 727ca6f363SBo Shen #undef CONFIG_CMD_IMI 737ca6f363SBo Shen #undef CONFIG_CMD_LOADS 747ca6f363SBo Shen #define CONFIG_CMD_PING 757ca6f363SBo Shen #define CONFIG_CMD_DHCP 767ca6f363SBo Shen 777ca6f363SBo Shen /* SDRAM */ 787ca6f363SBo Shen #define CONFIG_NR_DRAM_BANKS 1 797ca6f363SBo Shen #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 807ca6f363SBo Shen #define CONFIG_SYS_SDRAM_SIZE 0x10000000 817ca6f363SBo Shen 82cd23aac4SBo Shen #ifdef CONFIG_SPL_BUILD 83cd23aac4SBo Shen #define CONFIG_SYS_INIT_SP_ADDR 0x310000 84cd23aac4SBo Shen #else 857ca6f363SBo Shen #define CONFIG_SYS_INIT_SP_ADDR \ 867ca6f363SBo Shen (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 87cd23aac4SBo Shen #endif 887ca6f363SBo Shen 897ca6f363SBo Shen /* NAND flash */ 907ca6f363SBo Shen #define CONFIG_CMD_NAND 917ca6f363SBo Shen 927ca6f363SBo Shen #ifdef CONFIG_CMD_NAND 937ca6f363SBo Shen #define CONFIG_NAND_ATMEL 947ca6f363SBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE 1 957ca6f363SBo Shen #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 967ca6f363SBo Shen /* our ALE is AD21 */ 977ca6f363SBo Shen #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 987ca6f363SBo Shen /* our CLE is AD22 */ 997ca6f363SBo Shen #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 1007ca6f363SBo Shen #define CONFIG_SYS_NAND_ONFI_DETECTION 1017ca6f363SBo Shen /* PMECC & PMERRLOC */ 1027ca6f363SBo Shen #define CONFIG_ATMEL_NAND_HWECC 1037ca6f363SBo Shen #define CONFIG_ATMEL_NAND_HW_PMECC 1047ca6f363SBo Shen #define CONFIG_PMECC_CAP 4 1057ca6f363SBo Shen #define CONFIG_PMECC_SECTOR_SIZE 512 1067ca6f363SBo Shen #define CONFIG_CMD_NAND_TRIMFFS 1077ca6f363SBo Shen #define CONFIG_CMD_MTDPARTS 1087ca6f363SBo Shen 1097ca6f363SBo Shen #define CONFIG_MTD_DEVICE 1107ca6f363SBo Shen #define CONFIG_MTD_PARTITIONS 1117ca6f363SBo Shen #define CONFIG_RBTREE 1127ca6f363SBo Shen #define CONFIG_LZO 1137ca6f363SBo Shen #define CONFIG_CMD_UBI 1147ca6f363SBo Shen #define CONFIG_CMD_UBIFS 1157ca6f363SBo Shen #endif 1167ca6f363SBo Shen 1177ca6f363SBo Shen /* Ethernet Hardware */ 1187ca6f363SBo Shen #define CONFIG_MACB 1197ca6f363SBo Shen #define CONFIG_RMII 1207ca6f363SBo Shen #define CONFIG_NET_MULTI 1217ca6f363SBo Shen #define CONFIG_NET_RETRY_COUNT 20 1227ca6f363SBo Shen #define CONFIG_MACB_SEARCH_PHY 1237ca6f363SBo Shen #define CONFIG_RGMII 1247ca6f363SBo Shen #define CONFIG_CMD_MII 1257ca6f363SBo Shen #define CONFIG_PHYLIB 1267ca6f363SBo Shen 1277ca6f363SBo Shen /* MMC */ 1287ca6f363SBo Shen #define CONFIG_CMD_MMC 1297ca6f363SBo Shen 1307ca6f363SBo Shen #ifdef CONFIG_CMD_MMC 1317ca6f363SBo Shen #define CONFIG_MMC 1327ca6f363SBo Shen #define CONFIG_GENERIC_MMC 1337ca6f363SBo Shen #define CONFIG_GENERIC_ATMEL_MCI 1347ca6f363SBo Shen #define CONFIG_ATMEL_MCI_8BIT 1357ca6f363SBo Shen #endif 1367ca6f363SBo Shen 1377ca6f363SBo Shen /* USB */ 1387ca6f363SBo Shen #define CONFIG_CMD_USB 1397ca6f363SBo Shen 1407ca6f363SBo Shen #ifdef CONFIG_CMD_USB 1417ca6f363SBo Shen #define CONFIG_USB_ATMEL 1427ca6f363SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 1437ca6f363SBo Shen #define CONFIG_USB_OHCI_NEW 1447ca6f363SBo Shen #define CONFIG_SYS_USB_OHCI_CPU_INIT 1457ca6f363SBo Shen #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 1467ca6f363SBo Shen #define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained" 1477ca6f363SBo Shen #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 1487ca6f363SBo Shen #define CONFIG_DOS_PARTITION 1497ca6f363SBo Shen #define CONFIG_USB_STORAGE 1507ca6f363SBo Shen #endif 1517ca6f363SBo Shen 1527ca6f363SBo Shen #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 1537ca6f363SBo Shen #define CONFIG_CMD_FAT 1547ca6f363SBo Shen #define CONFIG_FAT_WRITE 1557ca6f363SBo Shen #define CONFIG_CMD_EXT4 1567ca6f363SBo Shen #define CONFIG_CMD_EXT4_WRITE 1577ca6f363SBo Shen #endif 1587ca6f363SBo Shen 1597ca6f363SBo Shen #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 1607ca6f363SBo Shen 1617ca6f363SBo Shen #if CONFIG_SYS_USE_NANDFLASH 1627ca6f363SBo Shen /* bootstrap + u-boot + env in nandflash */ 1637ca6f363SBo Shen #define CONFIG_ENV_IS_IN_NAND 1647ca6f363SBo Shen #define CONFIG_ENV_OFFSET 0xc0000 1657ca6f363SBo Shen #define CONFIG_ENV_OFFSET_REDUND 0x100000 1667ca6f363SBo Shen #define CONFIG_ENV_SIZE 0x20000 1677ca6f363SBo Shen #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \ 1687ca6f363SBo Shen "nand read 0x22000000 0x200000 0x600000;" \ 1697ca6f363SBo Shen "bootz 0x22000000 - 0x21000000" 1707ca6f363SBo Shen #elif CONFIG_SYS_USE_MMC 1717ca6f363SBo Shen /* bootstrap + u-boot + env in sd card */ 172c3814406SWu, Josh #define CONFIG_ENV_IS_IN_FAT 173c3814406SWu, Josh #define FAT_ENV_INTERFACE "mmc" 174c3814406SWu, Josh #define FAT_ENV_FILE "uboot.env" 175c3814406SWu, Josh #define FAT_ENV_DEVICE_AND_PART "0" 176c3814406SWu, Josh #define CONFIG_ENV_SIZE 0x4000 1777ca6f363SBo Shen #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91-sama5d3_xplained.dtb; " \ 1787ca6f363SBo Shen "fatload mmc 0:1 0x22000000 zImage; " \ 1797ca6f363SBo Shen "bootz 0x22000000 - 0x21000000" 1807ca6f363SBo Shen #else 1817ca6f363SBo Shen #define CONFIG_ENV_IS_NOWHERE 1827ca6f363SBo Shen #endif 1837ca6f363SBo Shen 1847ca6f363SBo Shen #ifdef CONFIG_SYS_USE_MMC 1857ca6f363SBo Shen #define CONFIG_BOOTARGS \ 1867ca6f363SBo Shen "console=ttyS0,115200 earlyprintk " \ 1877ca6f363SBo Shen "root=/dev/mmcblk0p2 rw rootwait" 1887ca6f363SBo Shen #else 1897ca6f363SBo Shen #define CONFIG_BOOTARGS \ 1907ca6f363SBo Shen "console=ttyS0,115200 earlyprintk " \ 1917ca6f363SBo Shen "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 1927ca6f363SBo Shen "256K(env),256k(evn_redundent),256k(spare)," \ 1937ca6f363SBo Shen "512k(dtb),6M(kernel)ro,-(rootfs) " \ 1947ca6f363SBo Shen "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" 1957ca6f363SBo Shen #endif 1967ca6f363SBo Shen 1977ca6f363SBo Shen #define CONFIG_BAUDRATE 115200 1987ca6f363SBo Shen 1997ca6f363SBo Shen #define CONFIG_SYS_PROMPT "U-Boot> " 2007ca6f363SBo Shen #define CONFIG_SYS_CBSIZE 256 2017ca6f363SBo Shen #define CONFIG_SYS_MAXARGS 16 2027ca6f363SBo Shen #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 2037ca6f363SBo Shen sizeof(CONFIG_SYS_PROMPT) + 16) 2047ca6f363SBo Shen #define CONFIG_SYS_LONGHELP 2057ca6f363SBo Shen #define CONFIG_CMDLINE_EDITING 2067ca6f363SBo Shen #define CONFIG_AUTO_COMPLETE 2077ca6f363SBo Shen #define CONFIG_SYS_HUSH_PARSER 2087ca6f363SBo Shen 2097ca6f363SBo Shen /* Size of malloc() pool */ 2107ca6f363SBo Shen #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 2117ca6f363SBo Shen 212cd23aac4SBo Shen /* SPL */ 213cd23aac4SBo Shen #define CONFIG_SPL_FRAMEWORK 214cd23aac4SBo Shen #define CONFIG_SPL_TEXT_BASE 0x300000 215cd23aac4SBo Shen #define CONFIG_SPL_MAX_SIZE 0x10000 216cd23aac4SBo Shen #define CONFIG_SPL_BSS_START_ADDR 0x20000000 217cd23aac4SBo Shen #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 218cd23aac4SBo Shen #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 219cd23aac4SBo Shen #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 220cd23aac4SBo Shen 221cd23aac4SBo Shen #define CONFIG_SPL_LIBCOMMON_SUPPORT 222cd23aac4SBo Shen #define CONFIG_SPL_LIBGENERIC_SUPPORT 223cd23aac4SBo Shen #define CONFIG_SPL_GPIO_SUPPORT 224cd23aac4SBo Shen #define CONFIG_SPL_SERIAL_SUPPORT 225cd23aac4SBo Shen 226cd23aac4SBo Shen #define CONFIG_SPL_BOARD_INIT 227cd23aac4SBo Shen #define CONFIG_SYS_MONITOR_LEN (512 << 10) 228cd23aac4SBo Shen 229cd23aac4SBo Shen #ifdef CONFIG_SYS_USE_MMC 230*993ea97eSBo Shen #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds 231cd23aac4SBo Shen #define CONFIG_SPL_MMC_SUPPORT 232cd23aac4SBo Shen #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 233cd23aac4SBo Shen #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 234e2ccdf89SPaul Kocialkowski #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 235205b4f33SGuillaume GARDET #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 236cd23aac4SBo Shen #define CONFIG_SPL_FAT_SUPPORT 237cd23aac4SBo Shen #define CONFIG_SPL_LIBDISK_SUPPORT 238cd23aac4SBo Shen 239cd23aac4SBo Shen #elif CONFIG_SYS_USE_NANDFLASH 240cd23aac4SBo Shen #define CONFIG_SPL_NAND_SUPPORT 241cd23aac4SBo Shen #define CONFIG_SPL_NAND_DRIVERS 242cd23aac4SBo Shen #define CONFIG_SPL_NAND_BASE 243cd23aac4SBo Shen #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 244cd23aac4SBo Shen #define CONFIG_SYS_NAND_5_ADDR_CYCLE 245cd23aac4SBo Shen #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 246cd23aac4SBo Shen #define CONFIG_SYS_NAND_PAGE_COUNT 64 247cd23aac4SBo Shen #define CONFIG_SYS_NAND_OOBSIZE 64 248cd23aac4SBo Shen #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 249cd23aac4SBo Shen #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 25005a4d544SWu, Josh #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 251cd23aac4SBo Shen 252cd23aac4SBo Shen #endif 253cd23aac4SBo Shen 2547ca6f363SBo Shen #endif 255