1 /* 2 * Copyright (C) 2010 Samsung Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * 5 * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_UNIVERSAL_H 11 #define __CONFIG_UNIVERSAL_H 12 13 #include <configs/exynos4-common.h> 14 15 #define CONFIG_TIZEN /* TIZEN lib */ 16 17 /* Keep L2 Cache Disabled */ 18 #define CONFIG_SYS_L2CACHE_OFF 1 19 20 /* Universal has 2 banks of DRAM */ 21 #define CONFIG_NR_DRAM_BANKS 2 22 #define CONFIG_SYS_SDRAM_BASE 0x40000000 23 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 24 25 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ 26 27 /* select serial console configuration */ 28 #define CONFIG_SERIAL2 29 #define CONFIG_BAUDRATE 115200 30 31 /* Console configuration */ 32 #define CONFIG_SYS_CONSOLE_INFO_QUIET 33 34 #define CONFIG_BOOTARGS "Please use defined boot" 35 #define CONFIG_BOOTCOMMAND "run mmcboot" 36 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" 37 38 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 39 - GENERATED_GBL_DATA_SIZE) 40 41 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 42 43 #define CONFIG_SYS_MONITOR_BASE 0x00000000 44 45 /* memtest works on */ 46 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 47 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 48 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 49 50 #define CONFIG_SYS_TEXT_BASE 0x44800000 51 52 #define CONFIG_MTD_DEVICE 53 #define CONFIG_MTD_PARTITIONS 54 55 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ 56 #define MTDIDS_DEFAULT "onenand0=samsung-onenand" 57 58 #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\ 59 "128k(s-boot)"\ 60 ",896k(bootloader)"\ 61 ",256k(params)"\ 62 ",2816k(config)"\ 63 ",8m(csa)"\ 64 ",7m(kernel)"\ 65 ",1m(log)"\ 66 ",12m(modem)"\ 67 ",60m(qboot)"\ 68 ",-(UBI)\0" 69 70 #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT 71 72 #define MBRPARTS_DEFAULT "20M(permanent)"\ 73 ",20M(boot)"\ 74 ",1G(system)"\ 75 ",100M(swap)"\ 76 ",-(UMS)\0" 77 78 #define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7" 79 #define CONFIG_BOOTBLOCK "10" 80 #define CONFIG_UBIBLOCK "9" 81 82 #define CONFIG_ENV_IS_IN_MMC 83 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV 84 #define CONFIG_ENV_SIZE 4096 85 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 86 87 #define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc " 88 #define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \ 89 "${mtdparts}" 90 91 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 92 93 #define CONFIG_ENV_VARS_UBOOT_CONFIG 94 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 95 96 #define CONFIG_EXTRA_ENV_SETTINGS \ 97 "updateb=" \ 98 "onenand erase 0x0 0x100000;" \ 99 "onenand write 0x42008000 0x0 0x100000\0" \ 100 "updatek=" \ 101 "onenand erase 0xc00000 0x500000;" \ 102 "onenand write 0x41008000 0xc00000 0x500000\0" \ 103 "bootk=" \ 104 "run loaduimage; bootm 0x40007FC0\0" \ 105 "updatebackup=" \ 106 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ 107 "mmc dev 0 0\0" \ 108 "updatebootb=" \ 109 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 110 "lpj=lpj=3981312\0" \ 111 "ubifsboot=" \ 112 "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \ 113 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ 114 CONFIG_ENV_COMMON_BOOT "; run bootk\0" \ 115 "tftpboot=" \ 116 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ 117 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ 118 CONFIG_ENV_COMMON_BOOT \ 119 "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \ 120 "nfsboot=" \ 121 "set bootargs root=/dev/nfs rw " \ 122 "nfsroot=${nfsroot},nolock,tcp " \ 123 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 124 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 125 "; run bootk\0" \ 126 "ramfsboot=" \ 127 "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 128 "${console} ${meminfo} " \ 129 "initrd=0x43000000,8M ramdisk=8192\0" \ 130 "mmcboot=" \ 131 "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 132 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 133 "run loaduimage; bootm 0x40007FC0\0" \ 134 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ 135 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 136 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 137 "verify=n\0" \ 138 "rootfstype=ext4\0" \ 139 "console=" CONFIG_DEFAULT_CONSOLE \ 140 "mtdparts=" MTDPARTS_DEFAULT \ 141 "mbrparts=" MBRPARTS_DEFAULT \ 142 "meminfo=crashkernel=32M@0x50000000\0" \ 143 "nfsroot=/nfsroot/arm\0" \ 144 "bootblock=" CONFIG_BOOTBLOCK "\0" \ 145 "ubiblock=" CONFIG_UBIBLOCK" \0" \ 146 "ubi=enabled\0" \ 147 "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 148 "mmcdev=0\0" \ 149 "mmcbootpart=2\0" \ 150 "mmcrootpart=3\0" \ 151 "opts=always_resume=1" 152 153 #define CONFIG_USE_ONENAND_BOARD_INIT 154 #define CONFIG_SAMSUNG_ONENAND 155 #define CONFIG_SYS_ONENAND_BASE 0x0C000000 156 157 #include <asm/arch/gpio.h> 158 /* 159 * I2C Settings 160 */ 161 #define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_B7 162 #define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_B6 163 164 #define CONFIG_SYS_I2C 165 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 166 #define CONFIG_SYS_I2C_SOFT_SPEED 50000 167 #define CONFIG_SYS_I2C_SOFT_SLAVE 0 168 #define CONFIG_SOFT_I2C_READ_REPEATED_START 169 #define CONFIG_I2C_MULTI_BUS 170 #define CONFIG_SYS_MAX_I2C_BUS 7 171 172 #define CONFIG_POWER 173 #define CONFIG_POWER_I2C 174 #define CONFIG_POWER_MAX8998 175 176 #define CONFIG_USB_GADGET_DWC2_OTG_PHY 177 178 /* 179 * SPI Settings 180 */ 181 #define CONFIG_SOFT_SPI 182 183 #ifndef __ASSEMBLY__ 184 void universal_spi_scl(int bit); 185 void universal_spi_sda(int bit); 186 int universal_spi_read(void); 187 #endif 188 189 /* Common misc for Samsung */ 190 #define CONFIG_MISC_COMMON 191 192 #define CONFIG_MISC_INIT_R 193 194 /* Download menu - Samsung common */ 195 #define CONFIG_LCD_MENU 196 #define CONFIG_LCD_MENU_BOARD 197 198 /* Download menu - definitions for check keys */ 199 #ifndef __ASSEMBLY__ 200 #include <power/max8998_pmic.h> 201 202 #define KEY_PWR_PMIC_NAME "MAX8998_PMIC" 203 #define KEY_PWR_STATUS_REG MAX8998_REG_STATUS1 204 #define KEY_PWR_STATUS_MASK (1 << 7) 205 #define KEY_PWR_INTERRUPT_REG MAX8998_REG_IRQ1 206 #define KEY_PWR_INTERRUPT_MASK (1 << 7) 207 208 #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 209 #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 210 #endif /* __ASSEMBLY__ */ 211 212 /* LCD console */ 213 #define LCD_BPP LCD_COLOR16 214 #define CONFIG_SYS_WHITE_ON_BLACK 215 216 /* 217 * LCD Settings 218 */ 219 #define CONFIG_BMP_16BPP 220 #define CONFIG_LD9040 221 #define CONFIG_VIDEO_BMP_GZIP 222 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) 223 224 #endif /* __CONFIG_H */ 225