1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2025 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RV1126B_COMMON_H 8 #define __CONFIG_RV1126B_COMMON_H 9 10 #define CFG_CPUID_OFFSET 0x22 11 12 #include "rockchip-common.h" 13 14 #define CONFIG_SPL_FRAMEWORK 15 #define CONFIG_SPL_TEXT_BASE 0x4fe00000 16 #define CONFIG_SPL_MAX_SIZE 0x00040000 17 #define CONFIG_SPL_BSS_START_ADDR 0x4fee0000 18 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 19 #define CONFIG_SPL_STACK 0x4fe00000 20 #ifdef CONFIG_SPL_LOAD_FIT_ADDRESS 21 #undef CONFIG_SPL_LOAD_FIT_ADDRESS 22 #endif 23 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x42000000 24 25 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 26 #define CONFIG_SYS_CBSIZE 1024 27 28 #ifdef CONFIG_SUPPORT_USBPLUG 29 #define CONFIG_SYS_TEXT_BASE 0x40000000 30 #else 31 #define CONFIG_SYS_TEXT_BASE 0x40200000 32 #endif 33 34 #define CONFIG_SYS_INIT_SP_ADDR 0x40600000 35 #define CONFIG_SYS_LOAD_ADDR 0x40700800 36 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 37 #undef COUNTER_FREQUENCY 38 39 #define GICD_BASE 0x21201000 40 #define GICC_BASE 0x21202000 41 42 /* secure otp */ 43 #define OTP_UBOOT_ROLLBACK_OFFSET 0x310 44 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 45 #define OTP_ALL_ONES_NUM_BITS 32 46 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x20 47 #define OTP_SECURE_BOOT_ENABLE_SIZE 1 48 #define OTP_RSA4096_ENABLE_ADDR 0x21 49 #define OTP_RSA4096_ENABLE_SIZE 1 50 #define OTP_RSA_HASH_ADDR 0x180 51 #define OTP_RSA_HASH_SIZE 32 52 53 #define CONFIG_BOUNCE_BUFFER 54 /* For most, U-Boot no need to use 0-1G space. */ 55 #define CONFIG_SYS_SDRAM_BASE 0x40000000 56 #define SDRAM_MAX_SIZE 0xc0000000ULL /* max 3G */ 57 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1M */ 58 59 /* env used only in U-Boot */ 60 #ifndef CONFIG_SPL_BUILD 61 /* usb mass storage */ 62 #define CONFIG_USB_FUNCTION_MASS_STORAGE 63 #define CONFIG_ROCKUSB_G_DNL_PID 0x110f 64 65 #ifdef CONFIG_ARM64 66 #define ENV_MEM_LAYOUT_SETTINGS \ 67 "scriptaddr=0x40600000\0" \ 68 "pxefile_addr_r=0x40700000\0" \ 69 "fdt_addr_r=0x48300000\0" \ 70 "kernel_addr_r=0x40200000\0" \ 71 "kernel_addr_aarch32_r=0x40208000\0" \ 72 "kernel_addr_c=0x45480000\0" \ 73 "ramdisk_addr_r=0x4a200000\0" 74 #endif 75 76 #include <config_distro_bootcmd.h> 77 78 #define CONFIG_EXTRA_ENV_SETTINGS \ 79 ENV_MEM_LAYOUT_SETTINGS \ 80 "partitions=" PARTS_RKIMG \ 81 ROCKCHIP_DEVICE_SETTINGS \ 82 RKIMG_DET_BOOTDEV \ 83 BOOTENV 84 85 #undef RKIMG_BOOTCOMMAND 86 #ifdef CONFIG_FIT_SIGNATURE 87 #define RKIMG_BOOTCOMMAND \ 88 "boot_fit;" 89 #else 90 #define RKIMG_BOOTCOMMAND \ 91 "boot_fit;" \ 92 "boot_android ${devtype} ${devnum};" 93 #endif 94 #endif /* !CONFIG_SPL_BUILD */ 95 96 #if defined(CONFIG_USB_HOST) || defined(CONFIG_SPL_USB_HOST_SUPPORT) 97 /* rockchip ohci host driver */ 98 #define CONFIG_USB_OHCI_NEW 99 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 100 #endif 101 102 #define CONFIG_PREBOOT 103 #define CONFIG_LIB_HW_RAND 104 105 #endif /* __CONFIG_RV1126B_COMMON_H */ 106