14e72b326SXuhui Lin /* SPDX-License-Identifier: GPL-2.0+ */ 24e72b326SXuhui Lin /* 34e72b326SXuhui Lin * (C) Copyright 2025 Rockchip Electronics Co., Ltd 44e72b326SXuhui Lin * 54e72b326SXuhui Lin */ 64e72b326SXuhui Lin 74e72b326SXuhui Lin #ifndef __CONFIG_RV1126B_COMMON_H 84e72b326SXuhui Lin #define __CONFIG_RV1126B_COMMON_H 94e72b326SXuhui Lin 104e72b326SXuhui Lin #define CFG_CPUID_OFFSET 0x22 114e72b326SXuhui Lin 124e72b326SXuhui Lin #include "rockchip-common.h" 134e72b326SXuhui Lin 144e72b326SXuhui Lin #define CONFIG_SPL_FRAMEWORK 15b37651cbSXuhui Lin #define CONFIG_SPL_TEXT_BASE 0x4fe00000 164e72b326SXuhui Lin #define CONFIG_SPL_MAX_SIZE 0x00040000 17b37651cbSXuhui Lin #define CONFIG_SPL_BSS_START_ADDR 0x4fee0000 184e72b326SXuhui Lin #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 19b37651cbSXuhui Lin #define CONFIG_SPL_STACK 0x4fe00000 204e72b326SXuhui Lin #ifdef CONFIG_SPL_LOAD_FIT_ADDRESS 214e72b326SXuhui Lin #undef CONFIG_SPL_LOAD_FIT_ADDRESS 224e72b326SXuhui Lin #endif 234e72b326SXuhui Lin #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x42000000 244e72b326SXuhui Lin 254e72b326SXuhui Lin #define CONFIG_SYS_MALLOC_LEN (32 << 20) 264e72b326SXuhui Lin #define CONFIG_SYS_CBSIZE 1024 274e72b326SXuhui Lin 284e72b326SXuhui Lin #ifdef CONFIG_SUPPORT_USBPLUG 294e72b326SXuhui Lin #define CONFIG_SYS_TEXT_BASE 0x40000000 304e72b326SXuhui Lin #else 314e72b326SXuhui Lin #define CONFIG_SYS_TEXT_BASE 0x40200000 324e72b326SXuhui Lin #endif 334e72b326SXuhui Lin 344e72b326SXuhui Lin #define CONFIG_SYS_INIT_SP_ADDR 0x40600000 354e72b326SXuhui Lin #define CONFIG_SYS_LOAD_ADDR 0x40700800 364e72b326SXuhui Lin #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 37bc4c13ecSXuhui Lin #undef COUNTER_FREQUENCY 384e72b326SXuhui Lin 394e72b326SXuhui Lin #define GICD_BASE 0x21201000 404e72b326SXuhui Lin #define GICC_BASE 0x21202000 414e72b326SXuhui Lin 42bd8c0db7SXuhui Lin /* secure otp */ 43bd8c0db7SXuhui Lin #define OTP_UBOOT_ROLLBACK_OFFSET 0x310 44bd8c0db7SXuhui Lin #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 45bd8c0db7SXuhui Lin #define OTP_ALL_ONES_NUM_BITS 32 46bd8c0db7SXuhui Lin #define OTP_SECURE_BOOT_ENABLE_ADDR 0x20 47bd8c0db7SXuhui Lin #define OTP_SECURE_BOOT_ENABLE_SIZE 1 48bd8c0db7SXuhui Lin #define OTP_RSA4096_ENABLE_ADDR 0x21 49bd8c0db7SXuhui Lin #define OTP_RSA4096_ENABLE_SIZE 1 50bd8c0db7SXuhui Lin #define OTP_RSA_HASH_ADDR 0x180 51bd8c0db7SXuhui Lin #define OTP_RSA_HASH_SIZE 32 52bd8c0db7SXuhui Lin 53*8532419bSXuhui Lin /* firmware key */ 54*8532419bSXuhui Lin #define OTP_FW_ENC_KEY_ADDR (0x24 * 4) 55*8532419bSXuhui Lin #define OTP_FW_ENC_KEY_SIZE (0x04 * 4) 56*8532419bSXuhui Lin 57*8532419bSXuhui Lin #define OTP_BACK_FW_ENC_KEY_ADDR (0x28 * 4) 58*8532419bSXuhui Lin #define OTP_BACK_FW_ENC_KEY_SIZE (0x04 * 4) 59*8532419bSXuhui Lin 604e72b326SXuhui Lin #define CONFIG_BOUNCE_BUFFER 614e72b326SXuhui Lin /* For most, U-Boot no need to use 0-1G space. */ 624e72b326SXuhui Lin #define CONFIG_SYS_SDRAM_BASE 0x40000000 634e72b326SXuhui Lin #define SDRAM_MAX_SIZE 0xc0000000ULL /* max 3G */ 644e72b326SXuhui Lin #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1M */ 654e72b326SXuhui Lin 664e72b326SXuhui Lin /* env used only in U-Boot */ 674e72b326SXuhui Lin #ifndef CONFIG_SPL_BUILD 684e72b326SXuhui Lin /* usb mass storage */ 694e72b326SXuhui Lin #define CONFIG_USB_FUNCTION_MASS_STORAGE 704e72b326SXuhui Lin #define CONFIG_ROCKUSB_G_DNL_PID 0x110f 714e72b326SXuhui Lin 724e72b326SXuhui Lin #ifdef CONFIG_ARM64 734e72b326SXuhui Lin #define ENV_MEM_LAYOUT_SETTINGS \ 744e72b326SXuhui Lin "scriptaddr=0x40600000\0" \ 754e72b326SXuhui Lin "pxefile_addr_r=0x40700000\0" \ 764e72b326SXuhui Lin "fdt_addr_r=0x48300000\0" \ 77a47201a1SJoseph Chen "kernel_addr_r=0x40200000\0" \ 78a47201a1SJoseph Chen "kernel_addr_aarch32_r=0x40208000\0" \ 794e72b326SXuhui Lin "kernel_addr_c=0x45480000\0" \ 804e72b326SXuhui Lin "ramdisk_addr_r=0x4a200000\0" 814e72b326SXuhui Lin #endif 824e72b326SXuhui Lin 834e72b326SXuhui Lin #include <config_distro_bootcmd.h> 844e72b326SXuhui Lin 854e72b326SXuhui Lin #define CONFIG_EXTRA_ENV_SETTINGS \ 864e72b326SXuhui Lin ENV_MEM_LAYOUT_SETTINGS \ 874e72b326SXuhui Lin "partitions=" PARTS_RKIMG \ 884e72b326SXuhui Lin ROCKCHIP_DEVICE_SETTINGS \ 894e72b326SXuhui Lin RKIMG_DET_BOOTDEV \ 904e72b326SXuhui Lin BOOTENV 914e72b326SXuhui Lin 924e72b326SXuhui Lin #undef RKIMG_BOOTCOMMAND 934e72b326SXuhui Lin #ifdef CONFIG_FIT_SIGNATURE 944e72b326SXuhui Lin #define RKIMG_BOOTCOMMAND \ 954e72b326SXuhui Lin "boot_fit;" 964e72b326SXuhui Lin #else 974e72b326SXuhui Lin #define RKIMG_BOOTCOMMAND \ 984e72b326SXuhui Lin "boot_fit;" \ 994e72b326SXuhui Lin "boot_android ${devtype} ${devnum};" 1004e72b326SXuhui Lin #endif 1014e72b326SXuhui Lin #endif /* !CONFIG_SPL_BUILD */ 1024e72b326SXuhui Lin 103b3d23d5cSXuhui Lin #if defined(CONFIG_USB_HOST) || defined(CONFIG_SPL_USB_HOST_SUPPORT) 1044e72b326SXuhui Lin /* rockchip ohci host driver */ 1054e72b326SXuhui Lin #define CONFIG_USB_OHCI_NEW 1064e72b326SXuhui Lin #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 107b3d23d5cSXuhui Lin #endif 1084e72b326SXuhui Lin 1094e72b326SXuhui Lin #define CONFIG_PREBOOT 1104e72b326SXuhui Lin #define CONFIG_LIB_HW_RAND 1114e72b326SXuhui Lin 1124e72b326SXuhui Lin #endif /* __CONFIG_RV1126B_COMMON_H */ 113