1 /* 2 * (C) Copyright 2019 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RV1126_COMMON_H 8 #define __CONFIG_RV1126_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define COUNTER_FREQUENCY 24000000 13 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 14 #define CONFIG_SYS_CBSIZE 1024 15 #define CONFIG_SYS_NS16550_MEM32 16 17 #ifdef CONFIG_SUPPORT_USBPLUG 18 #define CONFIG_SYS_TEXT_BASE 0x00000000 19 #else 20 #define CONFIG_SYS_TEXT_BASE 0x00600000 21 #endif 22 23 #define CONFIG_SYS_INIT_SP_ADDR 0x00800000 24 #define CONFIG_SYS_LOAD_ADDR 0x00e00800 25 #define CONFIG_SYS_BOOTM_LEN (64 << 20) 26 27 /* SPL */ 28 #define CONFIG_SPL_FRAMEWORK 29 #define CONFIG_SPL_TEXT_BASE 0x00000000 30 #define CONFIG_SPL_MAX_SIZE 0x30000 31 #define CONFIG_SPL_BSS_START_ADDR 0x00600000 32 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 33 #define CONFIG_SPL_STACK 0x00600000 34 35 #define GICD_BASE 0xfeff1000 36 #define GICC_BASE 0xfeff2000 37 38 /* secure boot otp rollback */ 39 #define OTP_UBOOT_ROLLBACK_OFFSET 0x68 40 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 41 #define OTP_ALL_ONES_NUM_BITS 32 42 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x0 43 #define OTP_SECURE_BOOT_ENABLE_SIZE 1 44 #define OTP_RSA_HASH_ADDR 0x10 45 #define OTP_RSA_HASH_SIZE 32 46 47 /* MMC/SD IP block */ 48 #define CONFIG_BOUNCE_BUFFER 49 50 /* Nand */ 51 #define CONFIG_SYS_MAX_NAND_DEVICE 1 52 #define CONFIG_SYS_NAND_ONFI_DETECTION 53 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 54 #define CONFIG_SYS_NAND_PAGE_COUNT 64 55 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 56 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000 57 58 #define CONFIG_SYS_SDRAM_BASE 0 59 #define SDRAM_MAX_SIZE 0xfd000000 60 61 #define CONFIG_PERIPH_DEVICE_START_ADDR (CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE) 62 #define CONFIG_PERIPH_DEVICE_END_ADDR SZ_4G 63 64 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 65 #ifndef CONFIG_SPL_BUILD 66 67 /* usb mass storage */ 68 #define CONFIG_USB_FUNCTION_MASS_STORAGE 69 #define CONFIG_ROCKUSB_G_DNL_PID 0x110b 70 71 /* memory size <= 128MB, TEE: 0x3000000 - 0x3200000 */ 72 #define ENV_MEM_LAYOUT_SETTINGS1 \ 73 "scriptaddr1=0x00000000\0" \ 74 "pxefile_addr1_r=0x00100000\0" \ 75 "fdt_addr1_r=0x02f00000\0" \ 76 "kernel_addr1_r=0x00008000\0" \ 77 "kernel_addr1_c=0x02008000\0" \ 78 "ramdisk_addr1_r=0x03200000\0" 79 80 /* memory size > 128MB */ 81 #define ENV_MEM_LAYOUT_SETTINGS \ 82 "scriptaddr=0x00000000\0" \ 83 "pxefile_addr_r=0x00100000\0" \ 84 "fdt_addr_r=0x08300000\0" \ 85 "kernel_addr_r=0x00008000\0" \ 86 "kernel_addr_c=0x02008000\0" \ 87 "ramdisk_addr_r=0x0a200000\0" 88 89 #include <config_distro_bootcmd.h> 90 #define CONFIG_EXTRA_ENV_SETTINGS \ 91 ENV_MEM_LAYOUT_SETTINGS \ 92 ENV_MEM_LAYOUT_SETTINGS1 \ 93 "partitions=" PARTS_DEFAULT \ 94 ROCKCHIP_DEVICE_SETTINGS \ 95 RKIMG_DET_BOOTDEV \ 96 BOOTENV_SHARED_RKNAND \ 97 BOOTENV 98 99 #undef RKIMG_BOOTCOMMAND 100 #ifdef CONFIG_FIT_SIGNATURE 101 #define RKIMG_BOOTCOMMAND \ 102 "boot_fit;" 103 #else 104 #define RKIMG_BOOTCOMMAND \ 105 "boot_fit;" \ 106 "boot_android ${devtype} ${devnum};" 107 #endif 108 #endif 109 110 #define CONFIG_LIB_HW_RAND 111 #define CONFIG_PREBOOT 112 113 #endif 114