1 /* 2 * (C) Copyright 2019 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RV1126_COMMON_H 8 #define __CONFIG_RV1126_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define COUNTER_FREQUENCY 24000000 13 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 14 #define CONFIG_SYS_CBSIZE 1024 15 #define CONFIG_SKIP_LOWLEVEL_INIT 16 #define CONFIG_SYS_NS16550_MEM32 17 18 #ifdef CONFIG_SUPPORT_USBPLUG 19 #define CONFIG_SYS_TEXT_BASE 0x00000000 20 #else 21 #define CONFIG_SYS_TEXT_BASE 0x00400000 22 #endif 23 24 #define CONFIG_SYS_INIT_SP_ADDR 0x00600000 25 #define CONFIG_SYS_LOAD_ADDR 0x00C00800 26 #define CONFIG_SYS_BOOTM_LEN (64 << 20) 27 28 /* SPL */ 29 #define CONFIG_SPL_FRAMEWORK 30 #define CONFIG_SPL_TEXT_BASE 0x00000000 31 #define CONFIG_SPL_MAX_SIZE 0x30000 32 #define CONFIG_SPL_BSS_START_ADDR 0x00600000 33 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 34 #define CONFIG_SPL_STACK 0x00600000 35 36 #define GICD_BASE 0xfeff1000 37 #define GICC_BASE 0xfeff2000 38 39 /* secure boot otp rollback */ 40 #define OTP_UBOOT_ROLLBACK_OFFSET 0x68 41 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 42 #define OTP_ALL_ONES_NUM_BITS 32 43 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x0 44 #define OTP_SECURE_BOOT_ENABLE_SIZE 1 45 #define OTP_RSA_HASH_ADDR 0x10 46 #define OTP_RSA_HASH_SIZE 32 47 48 /* MMC/SD IP block */ 49 #define CONFIG_BOUNCE_BUFFER 50 51 /* Nand */ 52 #define CONFIG_SYS_MAX_NAND_DEVICE 1 53 #define CONFIG_SYS_NAND_ONFI_DETECTION 54 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 55 #define CONFIG_SYS_NAND_PAGE_COUNT 64 56 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 57 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000 58 59 #define CONFIG_SYS_SDRAM_BASE 0 60 #define SDRAM_MAX_SIZE 0xfd000000 61 62 #define PERIPH_DEVICE_START_ADDR (CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE) 63 #define PERIPH_DEVICE_END_ADDR SZ_4G 64 65 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 66 #ifndef CONFIG_SPL_BUILD 67 68 /* usb mass storage */ 69 #define CONFIG_USB_FUNCTION_MASS_STORAGE 70 #define CONFIG_ROCKUSB_G_DNL_PID 0x110b 71 72 #define ENV_MEM_LAYOUT_SETTINGS \ 73 "scriptaddr=0x00000000\0" \ 74 "pxefile_addr_r=0x00100000\0" \ 75 "fdt_addr_r=0x08300000\0" \ 76 "kernel_addr_r=0x02008000\0" \ 77 "ramdisk_addr_r=0x0a200000\0" 78 79 #include <config_distro_bootcmd.h> 80 #define CONFIG_EXTRA_ENV_SETTINGS \ 81 ENV_MEM_LAYOUT_SETTINGS \ 82 "partitions=" PARTS_DEFAULT \ 83 ROCKCHIP_DEVICE_SETTINGS \ 84 RKIMG_DET_BOOTDEV \ 85 BOOTENV_SHARED_RKNAND \ 86 BOOTENV 87 88 #undef RKIMG_BOOTCOMMAND 89 #ifdef CONFIG_FIT_SIGNATURE 90 #define RKIMG_BOOTCOMMAND \ 91 "boot_fit;" 92 #else 93 #define RKIMG_BOOTCOMMAND \ 94 "boot_fit;" \ 95 "boot_android ${devtype} ${devnum};" 96 #endif 97 #endif 98 99 #define CONFIG_PREBOOT 100 101 #endif 102