1 /* 2 * (C) Copyright 2019 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RV1126_COMMON_H 8 #define __CONFIG_RV1126_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define COUNTER_FREQUENCY 24000000 13 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 14 #define CONFIG_SYS_CBSIZE 1024 15 #define CONFIG_SKIP_LOWLEVEL_INIT 16 #define CONFIG_SYS_NS16550_MEM32 17 18 #define CONFIG_SYS_TEXT_BASE 0x00600000 19 #define CONFIG_SYS_INIT_SP_ADDR 0x00800000 20 #define CONFIG_SYS_LOAD_ADDR 0x00C00800 21 #define CONFIG_SYS_BOOTM_LEN (64 << 20) 22 23 #define GICD_BASE 0xfeff1000 24 #define GICC_BASE 0xfeff2000 25 26 /* MMC/SD IP block */ 27 #define CONFIG_BOUNCE_BUFFER 28 29 #define CONFIG_SYS_SDRAM_BASE 0 30 #define SDRAM_MAX_SIZE 0xfd000000 31 32 #ifndef CONFIG_SPL_BUILD 33 34 /* usb mass storage */ 35 #define CONFIG_USB_FUNCTION_MASS_STORAGE 36 #define CONFIG_ROCKUSB_G_DNL_PID 0x330d 37 38 #define ENV_MEM_LAYOUT_SETTINGS \ 39 "scriptaddr=0x00000000\0" \ 40 "pxefile_addr_r=0x00100000\0" \ 41 "fdt_addr_r=0x08300000\0" \ 42 "kernel_addr_r=0x02008000\0" \ 43 "ramdisk_addr_r=0x0a200000\0" 44 45 #include <config_distro_bootcmd.h> 46 #define CONFIG_EXTRA_ENV_SETTINGS \ 47 ENV_MEM_LAYOUT_SETTINGS \ 48 "partitions=" PARTS_DEFAULT \ 49 ROCKCHIP_DEVICE_SETTINGS \ 50 RKIMG_DET_BOOTDEV \ 51 BOOTENV_SHARED_RKNAND \ 52 BOOTENV 53 #endif 54 55 #define CONFIG_PREBOOT 56 57 #endif 58