xref: /rk3399_rockchip-uboot/include/configs/rv1126_common.h (revision 7497bc3daedf41ef8f2b1d53121d70c50bbb59e0)
1 /*
2  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #ifndef __CONFIG_RV1126_COMMON_H
8 #define __CONFIG_RV1126_COMMON_H
9 
10 #include "rockchip-common.h"
11 
12 #define COUNTER_FREQUENCY		24000000
13 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
14 #define CONFIG_SYS_CBSIZE		1024
15 #define CONFIG_SKIP_LOWLEVEL_INIT
16 #define CONFIG_SYS_NS16550_MEM32
17 
18 #define CONFIG_SYS_TEXT_BASE		0x00600000
19 #define CONFIG_SYS_INIT_SP_ADDR		0x00800000
20 #define CONFIG_SYS_LOAD_ADDR		0x00C00800
21 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)
22 
23 /* SPL */
24 #define CONFIG_SPL_FRAMEWORK
25 #define CONFIG_SPL_TEXT_BASE		0x00000000
26 #define CONFIG_SPL_MAX_SIZE		0x20000
27 #define CONFIG_SPL_BSS_START_ADDR	0x00608000
28 #define CONFIG_SPL_BSS_MAX_SIZE		0x20000
29 #define CONFIG_SPL_STACK		0x00608000
30 
31 #define GICD_BASE			0xfeff1000
32 #define GICC_BASE			0xfeff2000
33 
34 /* MMC/SD IP block */
35 #define CONFIG_BOUNCE_BUFFER
36 
37 #define CONFIG_SYS_SDRAM_BASE		0
38 #define SDRAM_MAX_SIZE			0xfd000000
39 
40 #ifndef CONFIG_SPL_BUILD
41 
42 /* usb mass storage */
43 #define CONFIG_USB_FUNCTION_MASS_STORAGE
44 #define CONFIG_ROCKUSB_G_DNL_PID        0x330d
45 
46 #define ENV_MEM_LAYOUT_SETTINGS		\
47 	"scriptaddr=0x00000000\0"	\
48 	"pxefile_addr_r=0x00100000\0"	\
49 	"fdt_addr_r=0x08300000\0"	\
50 	"kernel_addr_r=0x02008000\0"	\
51 	"ramdisk_addr_r=0x0a200000\0"
52 
53 #include <config_distro_bootcmd.h>
54 #define CONFIG_EXTRA_ENV_SETTINGS	\
55 	ENV_MEM_LAYOUT_SETTINGS		\
56 	"partitions=" PARTS_DEFAULT	\
57 	ROCKCHIP_DEVICE_SETTINGS	\
58 	RKIMG_DET_BOOTDEV		\
59 	BOOTENV_SHARED_RKNAND		\
60 	BOOTENV
61 #endif
62 
63 #define CONFIG_PREBOOT
64 
65 #endif
66