1e7c03ac6SJoseph Chen /* 2e7c03ac6SJoseph Chen * (C) Copyright 2019 Rockchip Electronics Co., Ltd 3e7c03ac6SJoseph Chen * 4e7c03ac6SJoseph Chen * SPDX-License-Identifier: GPL-2.0+ 5e7c03ac6SJoseph Chen */ 6e7c03ac6SJoseph Chen 7e7c03ac6SJoseph Chen #ifndef __CONFIG_RV1126_COMMON_H 8e7c03ac6SJoseph Chen #define __CONFIG_RV1126_COMMON_H 9e7c03ac6SJoseph Chen 10e7c03ac6SJoseph Chen #include "rockchip-common.h" 11e7c03ac6SJoseph Chen 12e7c03ac6SJoseph Chen #define COUNTER_FREQUENCY 24000000 13e7c03ac6SJoseph Chen #define CONFIG_SYS_MALLOC_LEN (32 << 20) 14e7c03ac6SJoseph Chen #define CONFIG_SYS_CBSIZE 1024 15e7c03ac6SJoseph Chen #define CONFIG_SKIP_LOWLEVEL_INIT 16e7c03ac6SJoseph Chen #define CONFIG_SYS_NS16550_MEM32 17e7c03ac6SJoseph Chen 18d45e0962SJoseph Chen #define CONFIG_SYS_TEXT_BASE 0x00400000 19d45e0962SJoseph Chen #define CONFIG_SYS_INIT_SP_ADDR 0x00580000 20e7c03ac6SJoseph Chen #define CONFIG_SYS_LOAD_ADDR 0x00C00800 21e7c03ac6SJoseph Chen #define CONFIG_SYS_BOOTM_LEN (64 << 20) 22e7c03ac6SJoseph Chen 233f7db063SJason Zhu /* SPL */ 243f7db063SJason Zhu #define CONFIG_SPL_FRAMEWORK 253f7db063SJason Zhu #define CONFIG_SPL_TEXT_BASE 0x00000000 263f7db063SJason Zhu #define CONFIG_SPL_MAX_SIZE 0x20000 273f7db063SJason Zhu #define CONFIG_SPL_BSS_START_ADDR 0x00608000 283f7db063SJason Zhu #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 293f7db063SJason Zhu #define CONFIG_SPL_STACK 0x00608000 303f7db063SJason Zhu 31e7c03ac6SJoseph Chen #define GICD_BASE 0xfeff1000 32e7c03ac6SJoseph Chen #define GICC_BASE 0xfeff2000 33e7c03ac6SJoseph Chen 34e7c03ac6SJoseph Chen /* MMC/SD IP block */ 35e7c03ac6SJoseph Chen #define CONFIG_BOUNCE_BUFFER 36e7c03ac6SJoseph Chen 37*358df1d7SJason Zhu /* Nand */ 38*358df1d7SJason Zhu #define CONFIG_SYS_MAX_NAND_DEVICE 1 39*358df1d7SJason Zhu #define CONFIG_SYS_NAND_ONFI_DETECTION 40*358df1d7SJason Zhu #define CONFIG_SYS_NAND_PAGE_SIZE 2048 41*358df1d7SJason Zhu #define CONFIG_SYS_NAND_PAGE_COUNT 64 42*358df1d7SJason Zhu #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 43*358df1d7SJason Zhu 44e7c03ac6SJoseph Chen #define CONFIG_SYS_SDRAM_BASE 0 45e7c03ac6SJoseph Chen #define SDRAM_MAX_SIZE 0xfd000000 46e7c03ac6SJoseph Chen 47e7c03ac6SJoseph Chen #ifndef CONFIG_SPL_BUILD 48e7c03ac6SJoseph Chen 49e7c03ac6SJoseph Chen /* usb mass storage */ 50e7c03ac6SJoseph Chen #define CONFIG_USB_FUNCTION_MASS_STORAGE 51a0013123SJason Zhu #define CONFIG_ROCKUSB_G_DNL_PID 0x110b 52e7c03ac6SJoseph Chen 53e7c03ac6SJoseph Chen #define ENV_MEM_LAYOUT_SETTINGS \ 54e7c03ac6SJoseph Chen "scriptaddr=0x00000000\0" \ 55e7c03ac6SJoseph Chen "pxefile_addr_r=0x00100000\0" \ 56e7c03ac6SJoseph Chen "fdt_addr_r=0x08300000\0" \ 57e7c03ac6SJoseph Chen "kernel_addr_r=0x02008000\0" \ 58e7c03ac6SJoseph Chen "ramdisk_addr_r=0x0a200000\0" 59e7c03ac6SJoseph Chen 60e7c03ac6SJoseph Chen #include <config_distro_bootcmd.h> 61e7c03ac6SJoseph Chen #define CONFIG_EXTRA_ENV_SETTINGS \ 62e7c03ac6SJoseph Chen ENV_MEM_LAYOUT_SETTINGS \ 63e7c03ac6SJoseph Chen "partitions=" PARTS_DEFAULT \ 64e7c03ac6SJoseph Chen ROCKCHIP_DEVICE_SETTINGS \ 65e7c03ac6SJoseph Chen RKIMG_DET_BOOTDEV \ 66e7c03ac6SJoseph Chen BOOTENV_SHARED_RKNAND \ 67e7c03ac6SJoseph Chen BOOTENV 6878e35b2bSJoseph Chen 6978e35b2bSJoseph Chen #undef RKIMG_BOOTCOMMAND 7078e35b2bSJoseph Chen #ifdef CONFIG_FIT_SIGNATURE 7178e35b2bSJoseph Chen #define RKIMG_BOOTCOMMAND \ 7278e35b2bSJoseph Chen "boot_fit;" 7378e35b2bSJoseph Chen #else 7478e35b2bSJoseph Chen #define RKIMG_BOOTCOMMAND \ 7578e35b2bSJoseph Chen "boot_uimage;" \ 7678e35b2bSJoseph Chen "boot_fit;" \ 7778e35b2bSJoseph Chen "boot_android ${devtype} ${devnum};" 7878e35b2bSJoseph Chen #endif 79e7c03ac6SJoseph Chen #endif 80e7c03ac6SJoseph Chen 81e7c03ac6SJoseph Chen #define CONFIG_PREBOOT 82e7c03ac6SJoseph Chen 83e7c03ac6SJoseph Chen #endif 84