1e7c03ac6SJoseph Chen /* 2e7c03ac6SJoseph Chen * (C) Copyright 2019 Rockchip Electronics Co., Ltd 3e7c03ac6SJoseph Chen * 4e7c03ac6SJoseph Chen * SPDX-License-Identifier: GPL-2.0+ 5e7c03ac6SJoseph Chen */ 6e7c03ac6SJoseph Chen 7e7c03ac6SJoseph Chen #ifndef __CONFIG_RV1126_COMMON_H 8e7c03ac6SJoseph Chen #define __CONFIG_RV1126_COMMON_H 9e7c03ac6SJoseph Chen 10e7c03ac6SJoseph Chen #include "rockchip-common.h" 11e7c03ac6SJoseph Chen 12e7c03ac6SJoseph Chen #define COUNTER_FREQUENCY 24000000 13e7c03ac6SJoseph Chen #define CONFIG_SYS_MALLOC_LEN (32 << 20) 14e7c03ac6SJoseph Chen #define CONFIG_SYS_CBSIZE 1024 15e7c03ac6SJoseph Chen #define CONFIG_SYS_NS16550_MEM32 16e7c03ac6SJoseph Chen 17f79adc89SJoseph Chen #ifdef CONFIG_SUPPORT_USBPLUG 18f79adc89SJoseph Chen #define CONFIG_SYS_TEXT_BASE 0x00000000 19f79adc89SJoseph Chen #else 204f3eb98eSJason Zhu #define CONFIG_SYS_TEXT_BASE 0x00600000 21f79adc89SJoseph Chen #endif 22f79adc89SJoseph Chen 234f3eb98eSJason Zhu #define CONFIG_SYS_INIT_SP_ADDR 0x00800000 244f3eb98eSJason Zhu #define CONFIG_SYS_LOAD_ADDR 0x00e00800 25e7c03ac6SJoseph Chen #define CONFIG_SYS_BOOTM_LEN (64 << 20) 26e7c03ac6SJoseph Chen 273f7db063SJason Zhu /* SPL */ 283f7db063SJason Zhu #define CONFIG_SPL_FRAMEWORK 293f7db063SJason Zhu #define CONFIG_SPL_TEXT_BASE 0x00000000 305c0419f0SJason Zhu #define CONFIG_SPL_MAX_SIZE 0x30000 3155eb094fSJason Zhu #define CONFIG_SPL_BSS_START_ADDR 0x00600000 323f7db063SJason Zhu #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 3355eb094fSJason Zhu #define CONFIG_SPL_STACK 0x00600000 343f7db063SJason Zhu 35e7c03ac6SJoseph Chen #define GICD_BASE 0xfeff1000 36e7c03ac6SJoseph Chen #define GICC_BASE 0xfeff2000 37e7c03ac6SJoseph Chen 38cf13b784SJoseph Chen /* secure boot otp rollback */ 393a94f0b1SJason Zhu #define OTP_UBOOT_ROLLBACK_OFFSET 0x68 40cf13b784SJoseph Chen #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 41cf13b784SJoseph Chen #define OTP_ALL_ONES_NUM_BITS 32 425c0419f0SJason Zhu #define OTP_SECURE_BOOT_ENABLE_ADDR 0x0 435c0419f0SJason Zhu #define OTP_SECURE_BOOT_ENABLE_SIZE 1 445c0419f0SJason Zhu #define OTP_RSA_HASH_ADDR 0x10 455c0419f0SJason Zhu #define OTP_RSA_HASH_SIZE 32 46cf13b784SJoseph Chen 47e7c03ac6SJoseph Chen /* MMC/SD IP block */ 48e7c03ac6SJoseph Chen #define CONFIG_BOUNCE_BUFFER 49e7c03ac6SJoseph Chen 50358df1d7SJason Zhu /* Nand */ 51358df1d7SJason Zhu #define CONFIG_SYS_MAX_NAND_DEVICE 1 52358df1d7SJason Zhu #define CONFIG_SYS_NAND_ONFI_DETECTION 53358df1d7SJason Zhu #define CONFIG_SYS_NAND_PAGE_SIZE 2048 54358df1d7SJason Zhu #define CONFIG_SYS_NAND_PAGE_COUNT 64 55358df1d7SJason Zhu #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 569b54bc37SJason Zhu #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000 57358df1d7SJason Zhu 58e7c03ac6SJoseph Chen #define CONFIG_SYS_SDRAM_BASE 0 59e7c03ac6SJoseph Chen #define SDRAM_MAX_SIZE 0xfd000000 60e7c03ac6SJoseph Chen 611d22de7fSJoseph Chen #define CONFIG_PERIPH_DEVICE_START_ADDR (CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE) 621d22de7fSJoseph Chen #define CONFIG_PERIPH_DEVICE_END_ADDR SZ_4G 63ab2b3191SJoseph Chen 64225d5104SDavid Wu #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 65e7c03ac6SJoseph Chen #ifndef CONFIG_SPL_BUILD 66e7c03ac6SJoseph Chen 67e7c03ac6SJoseph Chen /* usb mass storage */ 68e7c03ac6SJoseph Chen #define CONFIG_USB_FUNCTION_MASS_STORAGE 69a0013123SJason Zhu #define CONFIG_ROCKUSB_G_DNL_PID 0x110b 70e7c03ac6SJoseph Chen 718bda2262SJoseph Chen /* memory size <= 128MB, TEE: 0x3000000 - 0x3200000 */ 728bda2262SJoseph Chen #define ENV_MEM_LAYOUT_SETTINGS1 \ 738bda2262SJoseph Chen "scriptaddr1=0x00000000\0" \ 748bda2262SJoseph Chen "pxefile_addr1_r=0x00100000\0" \ 758bda2262SJoseph Chen "fdt_addr1_r=0x02f00000\0" \ 76*c9b4262fSJoseph Chen "kernel_addr1_r=0x00008000\0" \ 77*c9b4262fSJoseph Chen "kernel_addr1_c=0x02008000\0" \ 788bda2262SJoseph Chen "ramdisk_addr1_r=0x03200000\0" 798bda2262SJoseph Chen 808bda2262SJoseph Chen /* memory size > 128MB */ 81e7c03ac6SJoseph Chen #define ENV_MEM_LAYOUT_SETTINGS \ 82e7c03ac6SJoseph Chen "scriptaddr=0x00000000\0" \ 83e7c03ac6SJoseph Chen "pxefile_addr_r=0x00100000\0" \ 84e7c03ac6SJoseph Chen "fdt_addr_r=0x08300000\0" \ 85*c9b4262fSJoseph Chen "kernel_addr_r=0x00008000\0" \ 86*c9b4262fSJoseph Chen "kernel_addr_c=0x02008000\0" \ 87e7c03ac6SJoseph Chen "ramdisk_addr_r=0x0a200000\0" 88e7c03ac6SJoseph Chen 89e7c03ac6SJoseph Chen #include <config_distro_bootcmd.h> 90e7c03ac6SJoseph Chen #define CONFIG_EXTRA_ENV_SETTINGS \ 91e7c03ac6SJoseph Chen ENV_MEM_LAYOUT_SETTINGS \ 928bda2262SJoseph Chen ENV_MEM_LAYOUT_SETTINGS1 \ 93e7c03ac6SJoseph Chen "partitions=" PARTS_DEFAULT \ 94e7c03ac6SJoseph Chen ROCKCHIP_DEVICE_SETTINGS \ 95e7c03ac6SJoseph Chen RKIMG_DET_BOOTDEV \ 96e7c03ac6SJoseph Chen BOOTENV_SHARED_RKNAND \ 97e7c03ac6SJoseph Chen BOOTENV 9878e35b2bSJoseph Chen 9978e35b2bSJoseph Chen #undef RKIMG_BOOTCOMMAND 10078e35b2bSJoseph Chen #ifdef CONFIG_FIT_SIGNATURE 10178e35b2bSJoseph Chen #define RKIMG_BOOTCOMMAND \ 10278e35b2bSJoseph Chen "boot_fit;" 10378e35b2bSJoseph Chen #else 10478e35b2bSJoseph Chen #define RKIMG_BOOTCOMMAND \ 10578e35b2bSJoseph Chen "boot_fit;" \ 10678e35b2bSJoseph Chen "boot_android ${devtype} ${devnum};" 10778e35b2bSJoseph Chen #endif 108e7c03ac6SJoseph Chen #endif 109e7c03ac6SJoseph Chen 1106b0f9e20SJoseph Chen #define CONFIG_LIB_HW_RAND 111e7c03ac6SJoseph Chen #define CONFIG_PREBOOT 112e7c03ac6SJoseph Chen 113e7c03ac6SJoseph Chen #endif 114