1 /* 2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #ifndef __CONFIG_RV1108_COMMON_H 7 #define __CONFIG_RV1108_COMMON_H 8 9 #include <asm/arch/hardware.h> 10 #include "rockchip-common.h" 11 12 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 13 #define CONFIG_SYS_CBSIZE 1024 14 #define CONFIG_SKIP_LOWLEVEL_INIT 15 16 #define CONFIG_SYS_SDRAM_BASE 0x60000000 17 #define SDRAM_MAX_SIZE 0x80000000 18 #define CONFIG_NR_DRAM_BANKS 1 19 #define CONFIG_SYS_TEXT_BASE CONFIG_SYS_SDRAM_BASE 20 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) 21 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000) 22 23 /* SPL support */ 24 #define CONFIG_SPL_STACK 0x10080700 25 #define CONFIG_SPL_TEXT_BASE 0x10080800 26 #define CONFIG_SPL_MAX_SIZE 0x1700 27 28 /* BSS setup */ 29 #define CONFIG_SPL_BSS_MAX_SIZE 0x100 30 31 #define CONFIG_ROCKUSB_G_DNL_PID 0x110A 32 33 #define CONFIG_BOUNCE_BUFFER 34 35 /* usb mass storage */ 36 #define CONFIG_USB_FUNCTION_MASS_STORAGE 37 38 /* rockchip ohci host driver */ 39 #define CONFIG_USB_OHCI_NEW 40 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 41 #endif 42