1 /* 2 * Configuation settings for the Renesas Technology RSK 7264 3 * 4 * Copyright (C) 2011 Renesas Electronics Europe Ltd. 5 * Copyright (C) 2008 Nobuhiro Iwamatsu 6 * Copyright (C) 2008 Renesas Solutions Corp. 7 * 8 * This file is released under the terms of GPL v2 and any later version. 9 * See the file COPYING in the root directory of the source tree for details. 10 */ 11 12 #ifndef __RSK7264_H 13 #define __RSK7264_H 14 15 #undef DEBUG 16 #define CONFIG_SH 1 17 #define CONFIG_SH2 1 18 #define CONFIG_SH2A 1 19 #define CONFIG_CPU_SH7264 1 20 #define CONFIG_RSK7264 1 21 22 #define CONFIG_CMD_FLASH 23 #define CONFIG_CMD_NET 24 #define CONFIG_CMD_NFS 25 #define CONFIG_CMD_PING 26 #define CONFIG_CMD_SAVEENV 27 #define CONFIG_CMD_SDRAM 28 #define CONFIG_CMD_MEMORY 29 #define CONFIG_CMD_CACHE 30 31 #define CONFIG_BAUDRATE 115200 32 #define CONFIG_BOOTARGS "console=ttySC3,115200" 33 #define CONFIG_BOOTDELAY 3 34 #define CONFIG_LOADADDR 0x0C100000 /* RSK7264_SDRAM_BASE + 1MB */ 35 36 #define CONFIG_VERSION_VARIABLE 37 #undef CONFIG_SHOW_BOOT_PROGRESS 38 39 /* MEMORY */ 40 #define RSK7264_SDRAM_BASE 0x0C000000 41 #define RSK7264_FLASH_BASE_1 0x20000000 /* Non cache */ 42 43 #define CONFIG_SYS_TEXT_BASE 0x0C1C0000 44 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 45 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 46 #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 47 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 48 #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 49 /* Buffer size for Boot Arguments passed to kernel */ 50 #define CONFIG_SYS_BARGSIZE 512 51 /* List of legal baudrate settings for this board */ 52 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 53 54 /* SCIF */ 55 #define CONFIG_SCIF_CONSOLE 1 56 #define CONFIG_CONS_SCIF3 1 57 58 #define CONFIG_SYS_MEMTEST_START RSK7264_SDRAM_BASE 59 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024)) 60 61 #define CONFIG_SYS_SDRAM_BASE RSK7264_SDRAM_BASE 62 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 63 64 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024) 65 #define CONFIG_SYS_MONITOR_BASE RSK7264_FLASH_BASE_1 66 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 67 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 68 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 69 70 /* FLASH */ 71 #define CONFIG_FLASH_CFI_DRIVER 72 #define CONFIG_SYS_FLASH_CFI 73 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 74 #undef CONFIG_SYS_FLASH_QUIET_TEST 75 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 76 #define CONFIG_SYS_FLASH_BASE RSK7264_FLASH_BASE_1 77 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 78 #define CONFIG_SYS_MAX_FLASH_SECT 512 79 #define CONFIG_SYS_MAX_FLASH_BANKS 1 80 81 #define CONFIG_ENV_IS_IN_FLASH 82 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 83 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 84 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 85 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 86 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 87 88 /* Board Clock */ 89 #define CONFIG_SYS_CLK_FREQ 33333333 90 #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 91 #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 92 93 /* Network interface */ 94 #define CONFIG_NET_MULTI 95 #define CONFIG_SMC911X 96 #define CONFIG_SMC911X_16_BIT 97 #define CONFIG_SMC911X_BASE (0x28000000) 98 99 #endif /* __RSK7264_H */ 100