1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RK3588_COMMON_H 8 #define __CONFIG_RK3588_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SPL_FRAMEWORK 13 #define CONFIG_SPL_TEXT_BASE 0x00000000 14 #define CONFIG_SPL_MAX_SIZE 0x00040000 15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000 17 #define CONFIG_SPL_STACK 0x03fe0000 18 19 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 20 #define CONFIG_SYS_CBSIZE 1024 21 #define CONFIG_SKIP_LOWLEVEL_INIT 22 #define CONFIG_SYS_TEXT_BASE 0x00200000 23 24 #define CONFIG_SYS_INIT_SP_ADDR 0x00400000 25 #define CONFIG_SYS_LOAD_ADDR 0x00400800 26 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 27 #define COUNTER_FREQUENCY 24000000 28 29 #define GICD_BASE 0xfe600000 30 #define GICR_BASE 0xfe680000 31 #define GICC_BASE 0xfe600000 32 33 /* secure otp */ 34 #define OTP_UBOOT_ROLLBACK_OFFSET 0x150 35 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 36 #define OTP_ALL_ONES_NUM_BITS 32 37 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x20 38 #define OTP_SECURE_BOOT_ENABLE_SIZE 1 39 #define OTP_RSA_HASH_ADDR 0x9c0 40 #define OTP_RSA_HASH_SIZE 32 41 42 /* MMC/SD IP block */ 43 #define CONFIG_BOUNCE_BUFFER 44 45 #define CONFIG_SYS_SDRAM_BASE 0 46 #define SDRAM_MAX_SIZE 0xf0000000 47 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 48 49 #ifndef CONFIG_SPL_BUILD 50 /* usb mass storage */ 51 #define CONFIG_USB_FUNCTION_MASS_STORAGE 52 #define CONFIG_ROCKUSB_G_DNL_PID 0x350b 53 54 /* 55 * decompressed kernel: 4M ~ 84M 56 * compressed kernel: 84M ~ 131M 57 */ 58 #define ENV_MEM_LAYOUT_SETTINGS \ 59 "scriptaddr=0x00500000\0" \ 60 "pxefile_addr_r=0x00600000\0" \ 61 "fdt_addr_r=0x0a100000\0" \ 62 "kernel_addr_r=0x00400000\0" \ 63 "kernel_addr_c=0x05480000\0" \ 64 "ramdisk_addr_r=0x0a200000\0" 65 66 #include <config_distro_bootcmd.h> 67 68 #define CONFIG_EXTRA_ENV_SETTINGS \ 69 ENV_MEM_LAYOUT_SETTINGS \ 70 "partitions=" PARTS_RKIMG \ 71 ROCKCHIP_DEVICE_SETTINGS \ 72 RKIMG_DET_BOOTDEV \ 73 BOOTENV 74 #endif 75 76 /* rockchip ohci host driver */ 77 #define CONFIG_USB_OHCI_NEW 78 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 79 80 #define CONFIG_PREBOOT 81 #define CONFIG_LIB_HW_RAND 82 83 #endif 84