xref: /rk3399_rockchip-uboot/include/configs/rk3576_common.h (revision 712e1ef7823301b391c71e9d79fe8c914099c199)
1 /* SPDX-License-Identifier:     GPL-2.0+ */
2 /*
3  * (C) Copyright 2023 Rockchip Electronics Co., Ltd
4  *
5  */
6 
7 #ifndef __CONFIG_RK3576_COMMON_H
8 #define __CONFIG_RK3576_COMMON_H
9 
10 #include "rockchip-common.h"
11 
12 #define CONFIG_SPL_FRAMEWORK
13 #define CONFIG_SPL_TEXT_BASE		0x40000000
14 #define CONFIG_SPL_MAX_SIZE		0x00040000
15 #define CONFIG_SPL_BSS_START_ADDR	0x43fe0000
16 #define CONFIG_SPL_BSS_MAX_SIZE		0x00010000
17 #define CONFIG_SPL_STACK		0x43fe0000
18 #ifdef CONFIG_SPL_LOAD_FIT_ADDRESS
19 #undef CONFIG_SPL_LOAD_FIT_ADDRESS
20 #endif
21 #define CONFIG_SPL_LOAD_FIT_ADDRESS	0x42000000
22 
23 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
24 #define CONFIG_SYS_CBSIZE		1024
25 
26 #ifdef CONFIG_SUPPORT_USBPLUG
27 #define CONFIG_SYS_TEXT_BASE		0x40000000
28 #else
29 #define CONFIG_SYS_TEXT_BASE		0x40200000
30 #endif
31 
32 #define CONFIG_SYS_INIT_SP_ADDR		0x40400000
33 #define CONFIG_SYS_LOAD_ADDR		0x40700800
34 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
35 #define COUNTER_FREQUENCY		24000000
36 
37 #define GICD_BASE			0x2a701000
38 #define GICC_BASE			0x2a702000
39 
40 /* secure otp */
41 #define OTP_UBOOT_ROLLBACK_OFFSET	0x610
42 #define OTP_UBOOT_ROLLBACK_WORDS	2	/* 64 bits, 2 words */
43 #define OTP_ALL_ONES_NUM_BITS		32
44 #define OTP_SECURE_BOOT_ENABLE_ADDR	0x20
45 #define OTP_SECURE_BOOT_ENABLE_SIZE	1
46 #define OTP_RSA4096_ENABLE_ADDR		0x21
47 #define OTP_RSA4096_ENABLE_SIZE		1
48 #define OTP_RSA_HASH_ADDR		0x200
49 #define OTP_RSA_HASH_SIZE		32
50 
51 #define CONFIG_BOUNCE_BUFFER
52 #define CONFIG_SYS_SDRAM_BASE		0x40000000
53 #define SDRAM_MAX_SIZE			(0x100000000 - CONFIG_SYS_SDRAM_BASE)	/* max 4G */
54 #define CONFIG_SYS_NONCACHED_MEMORY	(1 << 20)	/* 1M */
55 
56 /* env used only in U-Boot */
57 #ifndef CONFIG_SPL_BUILD
58 /* usb mass storage */
59 #define CONFIG_USB_FUNCTION_MASS_STORAGE
60 #define CONFIG_ROCKUSB_G_DNL_PID	0x350e
61 
62 /*
63  * DDR layout mainly follow rk3588 Soc
64  */
65 #define ENV_MEM_LAYOUT_SETTINGS \
66 	"scriptaddr=0x40500000\0" \
67 	"pxefile_addr_r=0x40600000\0" \
68 	"fdt_addr_r=0x48300000\0" \
69 	"kernel_addr_r=0x40400000\0" \
70 	"kernel_addr_c=0x45480000\0" \
71 	"ramdisk_addr_r=0x4a200000\0"
72 
73 #include <config_distro_bootcmd.h>
74 
75 #define CONFIG_EXTRA_ENV_SETTINGS \
76 	ENV_MEM_LAYOUT_SETTINGS \
77 	"partitions=" PARTS_RKIMG \
78 	ROCKCHIP_DEVICE_SETTINGS \
79 	RKIMG_DET_BOOTDEV \
80 	BOOTENV
81 #endif /* !CONFIG_SPL_BUILD */
82 
83 /* rockchip ohci host driver */
84 #define CONFIG_USB_OHCI_NEW
85 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
86 
87 #define CONFIG_PREBOOT
88 #define CONFIG_LIB_HW_RAND
89 
90 #endif /* __CONFIG_RK3576_COMMON_H */
91