xref: /rk3399_rockchip-uboot/include/configs/rk3399_common.h (revision 6d1970fa8a8d315af2b5c2c6f0ad5e5c24a382b5)
1a381bcf5SKever Yang /*
2a381bcf5SKever Yang  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
3a381bcf5SKever Yang  *
4a381bcf5SKever Yang  * SPDX-License-Identifier:     GPL-2.0+
5a381bcf5SKever Yang  */
6a381bcf5SKever Yang 
7a381bcf5SKever Yang #ifndef __CONFIG_RK3399_COMMON_H
8a381bcf5SKever Yang #define __CONFIG_RK3399_COMMON_H
9a381bcf5SKever Yang 
107f35bbb9SJacob Chen #include "rockchip-common.h"
117f35bbb9SJacob Chen 
12a381bcf5SKever Yang #define CONFIG_NR_DRAM_BANKS		1
13a381bcf5SKever Yang #define CONFIG_ENV_SIZE			0x2000
14a381bcf5SKever Yang #define CONFIG_SYS_MAXARGS		16
15a381bcf5SKever Yang #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
16a381bcf5SKever Yang #define CONFIG_SYS_CBSIZE		1024
17a381bcf5SKever Yang #define CONFIG_SKIP_LOWLEVEL_INIT
1866e87cc8SKever Yang #define CONFIG_SPL_FRAMEWORK
1966e87cc8SKever Yang #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
2066e87cc8SKever Yang #define CONFIG_SPL_SERIAL_SUPPORT
213e75c07dSPhilipp Tomsich #if defined(CONFIG_SPL_SPI_SUPPORT)
223e75c07dSPhilipp Tomsich #define CONFIG_SPL_SPI_LOAD
233e75c07dSPhilipp Tomsich #endif
24a381bcf5SKever Yang 
2588cb1a9eSPhilipp Tomsich #define COUNTER_FREQUENCY               24000000
2688cb1a9eSPhilipp Tomsich 
27a381bcf5SKever Yang #define CONFIG_SYS_NS16550_MEM32
28a381bcf5SKever Yang 
29a381bcf5SKever Yang #define CONFIG_SYS_TEXT_BASE		0x00200000
30a381bcf5SKever Yang #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
31a381bcf5SKever Yang #define CONFIG_SYS_LOAD_ADDR		0x00800800
323012a840SKever Yang #define CONFIG_SPL_STACK		0xff8effff
333d54eabcSPhilipp Tomsich #define CONFIG_SPL_TEXT_BASE		0xff8c2000
345302feb6SKever Yang #define CONFIG_SPL_MAX_SIZE		0x30000 - 0x2000
353012a840SKever Yang /*  BSS setup */
363012a840SKever Yang #define CONFIG_SPL_BSS_START_ADDR       0xff8e0000
373012a840SKever Yang #define CONFIG_SPL_BSS_MAX_SIZE         0x10000
38a381bcf5SKever Yang 
39a381bcf5SKever Yang #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
40a381bcf5SKever Yang 
41a381bcf5SKever Yang /* MMC/SD IP block */
42a381bcf5SKever Yang #define CONFIG_BOUNCE_BUFFER
43a381bcf5SKever Yang #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	200000000
44a381bcf5SKever Yang 
45583b1bc0SKever Yang #define CONFIG_SUPPORT_VFAT
46583b1bc0SKever Yang #define CONFIG_FS_EXT4
47a381bcf5SKever Yang 
48a381bcf5SKever Yang /* RAW SD card / eMMC locations. */
49a381bcf5SKever Yang #define CONFIG_SYS_SPI_U_BOOT_OFFS	(128 << 10)
50a381bcf5SKever Yang 
51a381bcf5SKever Yang /* FAT sd card locations. */
52a381bcf5SKever Yang #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
53a381bcf5SKever Yang #define CONFIG_SYS_SDRAM_BASE		0
54*6d1970faSKever Yang #define SDRAM_MAX_SIZE			0xf8000000
55a381bcf5SKever Yang #define CONFIG_NR_DRAM_BANKS		1
56a381bcf5SKever Yang 
57a381bcf5SKever Yang #define CONFIG_SF_DEFAULT_SPEED 20000000
58a381bcf5SKever Yang 
59a381bcf5SKever Yang #ifndef CONFIG_SPL_BUILD
60a381bcf5SKever Yang 
61a381bcf5SKever Yang #define ENV_MEM_LAYOUT_SETTINGS \
6286d01265SKever Yang 	"scriptaddr=0x00500000\0" \
6386d01265SKever Yang 	"pxefile_addr_r=0x00600000\0" \
64a381bcf5SKever Yang 	"fdt_addr_r=0x01f00000\0" \
65a381bcf5SKever Yang 	"kernel_addr_r=0x02000000\0" \
66a381bcf5SKever Yang 	"ramdisk_addr_r=0x04000000\0"
67a381bcf5SKever Yang 
68a381bcf5SKever Yang #include <config_distro_bootcmd.h>
69a381bcf5SKever Yang #define CONFIG_EXTRA_ENV_SETTINGS \
70583b1bc0SKever Yang 	ENV_MEM_LAYOUT_SETTINGS \
71583b1bc0SKever Yang 	"partitions=" PARTS_DEFAULT \
72a381bcf5SKever Yang 	BOOTENV
73a381bcf5SKever Yang 
74a381bcf5SKever Yang #endif
75a381bcf5SKever Yang 
76923e7b44SMengDongyang /* enable usb config for usb ether */
77923e7b44SMengDongyang #define CONFIG_USB_HOST_ETHER
78923e7b44SMengDongyang 
79923e7b44SMengDongyang #define CONFIG_USB_ETHER_ASIX
80923e7b44SMengDongyang #define CONFIG_USB_ETHER_ASIX88179
81923e7b44SMengDongyang #define CONFIG_USB_ETHER_MCS7830
82923e7b44SMengDongyang #define CONFIG_USB_ETHER_SMSC95XX
83923e7b44SMengDongyang #define CONFIG_USB_ETHER_RTL8152
84923e7b44SMengDongyang 
85923e7b44SMengDongyang /* rockchip xhci host driver */
86923e7b44SMengDongyang #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
87923e7b44SMengDongyang 
88a381bcf5SKever Yang #endif
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