1 /* 2 * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RK3066_COMMON_H 8 #define __CONFIG_RK3066_COMMON_H 9 10 #include <asm/arch/hardware.h> 11 #include "rockchip-common.h" 12 13 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 14 #define CONFIG_SYS_MAXARGS 16 15 #define CONFIG_BAUDRATE 115200 16 #define CONFIG_SYS_MALLOC_LEN (64 << 20) 17 #define CONFIG_SYS_CBSIZE 256 18 19 #define CONFIG_SYS_SDRAM_BASE 0x60000000 20 #define CONFIG_NR_DRAM_BANKS 1 21 #define SDRAM_BANK_SIZE (1024UL << 20UL) 22 #define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE 23 24 #define CONFIG_SYS_TIMER_RATE 24000000 25 #define CONFIG_SYS_TIMER_BASE 0x20038000 26 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 4) 27 #define CONFIG_SYS_TIMER_COUNTS_DOWN 28 29 #define CONFIG_SYS_TEXT_BASE 0x60408000 30 #define CONFIG_SYS_INIT_SP_ADDR 0x78000000 31 #define CONFIG_SYS_LOAD_ADDR 0x70800800 32 33 #define CONFIG_BOUNCE_BUFFER 34 #define CONFIG_SPL_FRAMEWORK 35 36 #define CONFIG_SYS_MAX_NAND_DEVICE 8 37 38 #define CONFIG_ROCKUSB_G_DNL_PID 0x300A 39 40 #ifdef CONFIG_TPL_BUILD 41 #define CONFIG_SPL_TEXT_BASE 0x10080C04 42 #define CONFIG_SPL_STACK 0x1008FFFF 43 /* tpl size max 32kb - 4byte RK30 header */ 44 #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x4) 45 #elif defined(CONFIG_SPL_BUILD) 46 /* spl size max 200k */ 47 #define CONFIG_SPL_MAX_SIZE 0x32000 48 #define CONFIG_SPL_TEXT_BASE 0x60000000 49 #define CONFIG_SPL_STACK 0x1008FFFF 50 #define CONFIG_SPL_BOARD_INIT 51 #define CONFIG_SPL_NAND_DRIVERS 52 #define CONFIG_SPL_NAND_LOAD 53 #define CONFIG_SPL_NAND_ECC 54 #define CONFIG_SPL_NAND_BASE 55 #define CONFIG_SPL_NAND_INIT 56 #define CONFIG_SPL_NAND_BBT 57 #define CONFIG_SPL_NAND_IDS 58 #define CONFIG_SPL_NAND_UTIL 59 #define CONFIG_SPL_NAND_RAW_ONLY 60 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 61 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 62 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 63 #define CONFIG_EXTRA_ENV_SETTINGS ROCKCHIP_DEVICE_SETTINGS 64 #define CONFIG_MTD_DEVICE 65 #endif 66 67 #include <config_distro_defaults.h> 68 69 #ifndef CONFIG_SPL_BUILD 70 71 #define CONFIG_USB_FUNCTION_MASS_STORAGE 72 73 #define CONFIG_MTD_DEVICE 74 #define MTDIDS_DEFAULT "nand0=rockchip-nand.0" 75 76 #define ENV_MEM_LAYOUT_SETTINGS \ 77 "scriptaddr=0x60000000\0" \ 78 "pxefile_addr_r=0x60100000\0" \ 79 "fdt_addr_r=0x61f00000\0" \ 80 "kernel_addr_r=0x62000000\0" \ 81 "ramdisk_addr_r=0x64000000\0" 82 83 #include <config_distro_bootcmd.h> 84 85 #define CONFIG_EXTRA_ENV_SETTINGS \ 86 "fdt_high=0x6fffffff\0" \ 87 "initrd_high=0x6fffffff\0" \ 88 "partitions=" PARTS_DEFAULT \ 89 "mtdids=" MTDIDS_DEFAULT "\0" \ 90 ENV_MEM_LAYOUT_SETTINGS \ 91 ROCKCHIP_DEVICE_SETTINGS \ 92 BOOTENV 93 94 #endif 95 96 #define CONFIG_PREBOOT 97 98 #endif 99