1578306eaSPaweł Jarosz /* 2578306eaSPaweł Jarosz * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com> 3578306eaSPaweł Jarosz * 4578306eaSPaweł Jarosz * SPDX-License-Identifier: GPL-2.0+ 5578306eaSPaweł Jarosz */ 6578306eaSPaweł Jarosz 7578306eaSPaweł Jarosz #ifndef __CONFIG_RK3066_COMMON_H 8578306eaSPaweł Jarosz #define __CONFIG_RK3066_COMMON_H 9578306eaSPaweł Jarosz 10578306eaSPaweł Jarosz #include <asm/arch/hardware.h> 11578306eaSPaweł Jarosz #include "rockchip-common.h" 12578306eaSPaweł Jarosz 13578306eaSPaweł Jarosz #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 14578306eaSPaweł Jarosz #define CONFIG_SYS_MAXARGS 16 15578306eaSPaweł Jarosz #define CONFIG_BAUDRATE 115200 16578306eaSPaweł Jarosz #define CONFIG_SYS_MALLOC_LEN (64 << 20) 17578306eaSPaweł Jarosz #define CONFIG_SYS_CBSIZE 256 18578306eaSPaweł Jarosz 19578306eaSPaweł Jarosz #define CONFIG_SYS_SDRAM_BASE 0x60000000 20578306eaSPaweł Jarosz #define CONFIG_NR_DRAM_BANKS 1 21578306eaSPaweł Jarosz #define SDRAM_BANK_SIZE (1024UL << 20UL) 22578306eaSPaweł Jarosz #define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE 23578306eaSPaweł Jarosz 24578306eaSPaweł Jarosz #define CONFIG_SYS_TIMER_RATE 24000000 25578306eaSPaweł Jarosz #define CONFIG_SYS_TIMER_BASE 0x20038000 26578306eaSPaweł Jarosz #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 4) 27578306eaSPaweł Jarosz #define CONFIG_SYS_TIMER_COUNTS_DOWN 28578306eaSPaweł Jarosz 29578306eaSPaweł Jarosz #define CONFIG_SYS_TEXT_BASE 0x60408000 30578306eaSPaweł Jarosz #define CONFIG_SYS_INIT_SP_ADDR 0x78000000 31578306eaSPaweł Jarosz #define CONFIG_SYS_LOAD_ADDR 0x70800800 32578306eaSPaweł Jarosz 33578306eaSPaweł Jarosz #define CONFIG_SYS_NS16550_MEM32 34578306eaSPaweł Jarosz #define CONFIG_BOUNCE_BUFFER 35578306eaSPaweł Jarosz #define CONFIG_SPL_FRAMEWORK 36578306eaSPaweł Jarosz 37578306eaSPaweł Jarosz #define CONFIG_SYS_MAX_NAND_DEVICE 8 38578306eaSPaweł Jarosz 39*ba437c8cSFrank Wang #define CONFIG_ROCKUSB_G_DNL_PID 0x300A 40*ba437c8cSFrank Wang 41578306eaSPaweł Jarosz #ifdef CONFIG_TPL_BUILD 42578306eaSPaweł Jarosz #define CONFIG_SPL_TEXT_BASE 0x10080C04 43578306eaSPaweł Jarosz #define CONFIG_SPL_STACK 0x1008FFFF 44578306eaSPaweł Jarosz /* tpl size max 32kb - 4byte RK30 header */ 45578306eaSPaweł Jarosz #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x4) 46578306eaSPaweł Jarosz #elif defined(CONFIG_SPL_BUILD) 47578306eaSPaweł Jarosz /* spl size max 200k */ 48578306eaSPaweł Jarosz #define CONFIG_SPL_MAX_SIZE 0x32000 49578306eaSPaweł Jarosz #define CONFIG_SPL_TEXT_BASE 0x60000000 50578306eaSPaweł Jarosz #define CONFIG_SPL_STACK 0x1008FFFF 51578306eaSPaweł Jarosz #define CONFIG_SPL_BOARD_INIT 52578306eaSPaweł Jarosz #define CONFIG_SPL_NAND_DRIVERS 53578306eaSPaweł Jarosz #define CONFIG_SPL_NAND_LOAD 54578306eaSPaweł Jarosz #define CONFIG_SPL_NAND_ECC 55578306eaSPaweł Jarosz #define CONFIG_SPL_NAND_BASE 56578306eaSPaweł Jarosz #define CONFIG_SPL_NAND_INIT 57578306eaSPaweł Jarosz #define CONFIG_SPL_NAND_BBT 58578306eaSPaweł Jarosz #define CONFIG_SPL_NAND_IDS 59578306eaSPaweł Jarosz #define CONFIG_SPL_NAND_UTIL 60578306eaSPaweł Jarosz #define CONFIG_SPL_NAND_RAW_ONLY 61578306eaSPaweł Jarosz #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 62578306eaSPaweł Jarosz #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 63578306eaSPaweł Jarosz #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 64578306eaSPaweł Jarosz #define CONFIG_EXTRA_ENV_SETTINGS ROCKCHIP_DEVICE_SETTINGS 65578306eaSPaweł Jarosz #define CONFIG_MTD_DEVICE 66578306eaSPaweł Jarosz #endif 67578306eaSPaweł Jarosz 68578306eaSPaweł Jarosz #include <config_distro_defaults.h> 69578306eaSPaweł Jarosz 70578306eaSPaweł Jarosz #ifndef CONFIG_SPL_BUILD 71578306eaSPaweł Jarosz 72578306eaSPaweł Jarosz #define CONFIG_USB_FUNCTION_MASS_STORAGE 73578306eaSPaweł Jarosz 74578306eaSPaweł Jarosz #define CONFIG_MTD_DEVICE 75578306eaSPaweł Jarosz #define MTDIDS_DEFAULT "nand0=rockchip-nand.0" 76578306eaSPaweł Jarosz 77578306eaSPaweł Jarosz #define ENV_MEM_LAYOUT_SETTINGS \ 78578306eaSPaweł Jarosz "scriptaddr=0x60000000\0" \ 79578306eaSPaweł Jarosz "pxefile_addr_r=0x60100000\0" \ 80578306eaSPaweł Jarosz "fdt_addr_r=0x61f00000\0" \ 81578306eaSPaweł Jarosz "kernel_addr_r=0x62000000\0" \ 82578306eaSPaweł Jarosz "ramdisk_addr_r=0x64000000\0" 83578306eaSPaweł Jarosz 84578306eaSPaweł Jarosz #include <config_distro_bootcmd.h> 85578306eaSPaweł Jarosz 86578306eaSPaweł Jarosz #define CONFIG_EXTRA_ENV_SETTINGS \ 87578306eaSPaweł Jarosz "fdt_high=0x6fffffff\0" \ 88578306eaSPaweł Jarosz "initrd_high=0x6fffffff\0" \ 89578306eaSPaweł Jarosz "partitions=" PARTS_DEFAULT \ 90578306eaSPaweł Jarosz "mtdids=" MTDIDS_DEFAULT "\0" \ 91578306eaSPaweł Jarosz ENV_MEM_LAYOUT_SETTINGS \ 92578306eaSPaweł Jarosz ROCKCHIP_DEVICE_SETTINGS \ 93578306eaSPaweł Jarosz BOOTENV 94578306eaSPaweł Jarosz 95578306eaSPaweł Jarosz #endif 96578306eaSPaweł Jarosz 97578306eaSPaweł Jarosz #define CONFIG_PREBOOT 98578306eaSPaweł Jarosz 99578306eaSPaweł Jarosz #endif 100