1be1d5e03Shuang lin /* 2be1d5e03Shuang lin * (C) Copyright 2015 Rockchip Electronics Co., Ltd 3be1d5e03Shuang lin * 4be1d5e03Shuang lin * SPDX-License-Identifier: GPL-2.0+ 5be1d5e03Shuang lin */ 6be1d5e03Shuang lin #ifndef __CONFIG_RK3036_COMMON_H 7be1d5e03Shuang lin #define __CONFIG_RK3036_COMMON_H 8be1d5e03Shuang lin 9*d2d763faSXu Ziyuan #define CONFIG_SYS_CACHELINE_SIZE 64 103709844fSAlbert ARIBAUD 11be1d5e03Shuang lin #include <asm/arch/hardware.h> 12be1d5e03Shuang lin 13be1d5e03Shuang lin #define CONFIG_SYS_NO_FLASH 14be1d5e03Shuang lin #define CONFIG_NR_DRAM_BANKS 1 15be1d5e03Shuang lin #define CONFIG_ENV_IS_NOWHERE 16be1d5e03Shuang lin #define CONFIG_ENV_SIZE 0x2000 17be1d5e03Shuang lin #define CONFIG_SYS_MAXARGS 16 18be1d5e03Shuang lin #define CONFIG_BAUDRATE 115200 19be1d5e03Shuang lin #define CONFIG_SYS_MALLOC_LEN (32 << 20) 20be1d5e03Shuang lin #define CONFIG_SYS_CBSIZE 1024 21be1d5e03Shuang lin #define CONFIG_SKIP_LOWLEVEL_INIT 22be1d5e03Shuang lin #define CONFIG_SYS_THUMB_BUILD 23be1d5e03Shuang lin #define CONFIG_DISPLAY_BOARDINFO 24be1d5e03Shuang lin 25be1d5e03Shuang lin #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) 26be1d5e03Shuang lin #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ 27be1d5e03Shuang lin #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) 28be1d5e03Shuang lin 299b205198SSimon Glass #define CONFIG_SPL_SERIAL_SUPPORT 309b205198SSimon Glass 31be1d5e03Shuang lin #define CONFIG_SYS_NS16550 32be1d5e03Shuang lin #define CONFIG_SYS_NS16550_MEM32 33be1d5e03Shuang lin 34be1d5e03Shuang lin #define CONFIG_SYS_TEXT_BASE 0x60000000 35be1d5e03Shuang lin #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 36be1d5e03Shuang lin #define CONFIG_SYS_LOAD_ADDR 0x60800800 37be1d5e03Shuang lin #define CONFIG_SPL_STACK 0x10081fff 38be1d5e03Shuang lin #define CONFIG_SPL_TEXT_BASE 0x10081004 39be1d5e03Shuang lin 40be1d5e03Shuang lin #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) 41be1d5e03Shuang lin #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" 42be1d5e03Shuang lin 43be1d5e03Shuang lin /* MMC/SD IP block */ 44be1d5e03Shuang lin #define CONFIG_MMC 45be1d5e03Shuang lin #define CONFIG_GENERIC_MMC 46be1d5e03Shuang lin #define CONFIG_DWMMC 47be1d5e03Shuang lin #define CONFIG_BOUNCE_BUFFER 48be1d5e03Shuang lin 49be1d5e03Shuang lin #define CONFIG_FAT_WRITE 50be1d5e03Shuang lin #define CONFIG_PARTITION_UUIDS 51be1d5e03Shuang lin #define CONFIG_CMD_PART 52be1d5e03Shuang lin 53be1d5e03Shuang lin #define CONFIG_SYS_SDRAM_BASE 0x60000000 54be1d5e03Shuang lin #define CONFIG_NR_DRAM_BANKS 1 55be1d5e03Shuang lin #define SDRAM_BANK_SIZE (512UL << 20UL) 56be1d5e03Shuang lin 57be1d5e03Shuang lin #define CONFIG_SPI_FLASH 58be1d5e03Shuang lin #define CONFIG_SPI 59be1d5e03Shuang lin #define CONFIG_SPI_FLASH_GIGADEVICE 60be1d5e03Shuang lin #define CONFIG_SF_DEFAULT_SPEED 20000000 61be1d5e03Shuang lin 62be1d5e03Shuang lin #ifndef CONFIG_SPL_BUILD 63*d2d763faSXu Ziyuan /* usb otg */ 64*d2d763faSXu Ziyuan #define CONFIG_USB_GADGET 65*d2d763faSXu Ziyuan #define CONFIG_USB_GADGET_DUALSPEED 66*d2d763faSXu Ziyuan #define CONFIG_USB_GADGET_DWC2_OTG 67*d2d763faSXu Ziyuan #define CONFIG_USB_GADGET_VBUS_DRAW 0 68*d2d763faSXu Ziyuan 69*d2d763faSXu Ziyuan /* fastboot */ 70*d2d763faSXu Ziyuan #define CONFIG_CMD_FASTBOOT 71*d2d763faSXu Ziyuan #define CONFIG_USB_FUNCTION_FASTBOOT 72*d2d763faSXu Ziyuan #define CONFIG_FASTBOOT_FLASH 73*d2d763faSXu Ziyuan #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 74*d2d763faSXu Ziyuan #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 75*d2d763faSXu Ziyuan #define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 76*d2d763faSXu Ziyuan 77*d2d763faSXu Ziyuan #define CONFIG_USB_GADGET_DOWNLOAD 78*d2d763faSXu Ziyuan #define CONFIG_G_DNL_MANUFACTURER "Rockchip" 79*d2d763faSXu Ziyuan #define CONFIG_G_DNL_VENDOR_NUM 0x2207 80*d2d763faSXu Ziyuan #define CONFIG_G_DNL_PRODUCT_NUM 0x310a 81*d2d763faSXu Ziyuan 82be1d5e03Shuang lin #include <config_distro_defaults.h> 83be1d5e03Shuang lin 84be1d5e03Shuang lin #define ENV_MEM_LAYOUT_SETTINGS \ 85be1d5e03Shuang lin "scriptaddr=0x60000000\0" \ 86be1d5e03Shuang lin "pxefile_addr_r=0x60100000\0" \ 87be1d5e03Shuang lin "fdt_addr_r=0x61f00000\0" \ 88be1d5e03Shuang lin "kernel_addr_r=0x62000000\0" \ 89be1d5e03Shuang lin "ramdisk_addr_r=0x64000000\0" 90be1d5e03Shuang lin 91be1d5e03Shuang lin /* First try to boot from SD (index 0), then eMMC (index 1 */ 92be1d5e03Shuang lin #define BOOT_TARGET_DEVICES(func) \ 93be1d5e03Shuang lin func(MMC, mmc, 0) \ 94be1d5e03Shuang lin func(MMC, mmc, 1) 95be1d5e03Shuang lin 96be1d5e03Shuang lin #include <config_distro_bootcmd.h> 97be1d5e03Shuang lin 98be1d5e03Shuang lin /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board, 99be1d5e03Shuang lin * so limit the fdt reallocation to that */ 100be1d5e03Shuang lin #define CONFIG_EXTRA_ENV_SETTINGS \ 101be1d5e03Shuang lin "fdt_high=0x7fffffff\0" \ 102be1d5e03Shuang lin ENV_MEM_LAYOUT_SETTINGS \ 103be1d5e03Shuang lin BOOTENV 104be1d5e03Shuang lin #endif 105be1d5e03Shuang lin 106be1d5e03Shuang lin #endif 107