1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RK1808_COMMON_H 8 #define __CONFIG_RK1808_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SPL_FRAMEWORK 13 #define CONFIG_SPL_TEXT_BASE 0x00000000 14 #define CONFIG_SPL_MAX_SIZE 0x00020000 15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00002000 17 #define CONFIG_SPL_STACK 0x03fe0000 18 19 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 20 #define CONFIG_SYS_CBSIZE 1024 21 #define CONFIG_SKIP_LOWLEVEL_INIT 22 #define CONFIG_SYS_TEXT_BASE 0x00600000 23 #define CONFIG_SYS_INIT_SP_ADDR 0x00800000 24 #define CONFIG_SYS_LOAD_ADDR 0x00800800 25 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 26 #define COUNTER_FREQUENCY 24000000 27 28 #define GICD_BASE 0xff100000 29 #define GICR_BASE 0xff140000 30 #define GICC_BASE 0xff300000 31 32 /* MMC/SD IP block */ 33 #define CONFIG_BOUNCE_BUFFER 34 #define CONFIG_SUPPORT_EMMC_RPMB 35 36 #define CONFIG_SYS_SDRAM_BASE 0 37 #define SDRAM_MAX_SIZE 0xf8000000 38 #define SDRAM_BANK_SIZE (2UL << 30) 39 #define CONFIG_PREBOOT 40 41 #ifndef CONFIG_SPL_BUILD 42 /* usb mass storage */ 43 #define CONFIG_USB_FUNCTION_MASS_STORAGE 44 #define CONFIG_ROCKUSB_G_DNL_PID 0x330d 45 46 #define ENV_MEM_LAYOUT_SETTINGS \ 47 "scriptaddr=0x00500000\0" \ 48 "pxefile_addr_r=0x00600000\0" \ 49 "fdt_addr_r=0x01f00000\0" \ 50 "kernel_addr_no_bl32_r=0x00280000\0" \ 51 "kernel_addr_r=0x00680000\0" \ 52 "kernel_addr_c=0x04080000\0" \ 53 "ramdisk_addr_r=0x0a200000\0" 54 55 #include <config_distro_bootcmd.h> 56 57 #define CONFIG_EXTRA_ENV_SETTINGS \ 58 ENV_MEM_LAYOUT_SETTINGS \ 59 "partitions=" PARTS_DEFAULT \ 60 ROCKCHIP_DEVICE_SETTINGS \ 61 RKIMG_DET_BOOTDEV \ 62 BOOTENV 63 #endif 64 65 #endif /* __CONFIG_RK1808_COMMON_H */ 66