1b8fa3d2aSJoseph Chen /* SPDX-License-Identifier: GPL-2.0+ */ 2b8fa3d2aSJoseph Chen /* 3b8fa3d2aSJoseph Chen * (C) Copyright 2017 Rockchip Electronics Co., Ltd 4b8fa3d2aSJoseph Chen * 5b8fa3d2aSJoseph Chen */ 6b8fa3d2aSJoseph Chen 7b8fa3d2aSJoseph Chen #ifndef __CONFIG_RK1808_COMMON_H 8b8fa3d2aSJoseph Chen #define __CONFIG_RK1808_COMMON_H 9b8fa3d2aSJoseph Chen 10b8fa3d2aSJoseph Chen #include "rockchip-common.h" 11b8fa3d2aSJoseph Chen 12b8fa3d2aSJoseph Chen #define CONFIG_SYS_MALLOC_LEN (32 << 20) 13b8fa3d2aSJoseph Chen #define CONFIG_SYS_CBSIZE 1024 14b8fa3d2aSJoseph Chen #define CONFIG_SKIP_LOWLEVEL_INIT 15225168aaSJoseph Chen #define CONFIG_SYS_TEXT_BASE 0x00600000 16225168aaSJoseph Chen #define CONFIG_SYS_INIT_SP_ADDR 0x00800000 17b8fa3d2aSJoseph Chen #define CONFIG_SYS_LOAD_ADDR 0x00800800 18b8fa3d2aSJoseph Chen #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 19b8fa3d2aSJoseph Chen #define COUNTER_FREQUENCY 24000000 20b8fa3d2aSJoseph Chen 21b8fa3d2aSJoseph Chen #define GICD_BASE 0xff100000 22b8fa3d2aSJoseph Chen #define GICR_BASE 0xff140000 23b8fa3d2aSJoseph Chen #define GICC_BASE 0xff300000 24b8fa3d2aSJoseph Chen 25b8fa3d2aSJoseph Chen /* MMC/SD IP block */ 26b8fa3d2aSJoseph Chen #define CONFIG_BOUNCE_BUFFER 27b8fa3d2aSJoseph Chen 28b8fa3d2aSJoseph Chen #define CONFIG_SYS_SDRAM_BASE 0 29b8fa3d2aSJoseph Chen #define SDRAM_MAX_SIZE 0xff000000 30b8fa3d2aSJoseph Chen #define SDRAM_BANK_SIZE (2UL << 30) 31b8fa3d2aSJoseph Chen #define CONFIG_PREBOOT 32b8fa3d2aSJoseph Chen 33b8fa3d2aSJoseph Chen #ifndef CONFIG_SPL_BUILD 34b8fa3d2aSJoseph Chen /* usb mass storage */ 35dd620b63SWilliam Wu #define CONFIG_USB_FUNCTION_MASS_STORAGE 36dd620b63SWilliam Wu #define CONFIG_ROCKUSB_G_DNL_PID 0x330d 37b8fa3d2aSJoseph Chen 38b8fa3d2aSJoseph Chen #define ENV_MEM_LAYOUT_SETTINGS \ 39b8fa3d2aSJoseph Chen "scriptaddr=0x00500000\0" \ 40b8fa3d2aSJoseph Chen "pxefile_addr_r=0x00600000\0" \ 41b8fa3d2aSJoseph Chen "fdt_addr_r=0x01f00000\0" \ 42b8fa3d2aSJoseph Chen "kernel_addr_r=0x02080000\0" \ 43*1dfe3932SJoseph Chen "kernel_addr_c=0x04080000\0" \ 44b8fa3d2aSJoseph Chen "ramdisk_addr_r=0x0a200000\0" 45b8fa3d2aSJoseph Chen 46b8fa3d2aSJoseph Chen #include <config_distro_bootcmd.h> 47bf6219b0SJoseph Chen 48bf6219b0SJoseph Chen #ifdef CONFIG_DM_RAMDISK 49bf6219b0SJoseph Chen #undef RKIMG_DET_BOOTDEV 50bf6219b0SJoseph Chen #define RKIMG_DET_BOOTDEV \ 51bf6219b0SJoseph Chen "rkimg_bootdev=" \ 52bf6219b0SJoseph Chen "setenv devtype ramdisk; setenv devnum 0; \0" 53bf6219b0SJoseph Chen #endif 54bf6219b0SJoseph Chen 55b8fa3d2aSJoseph Chen #define CONFIG_EXTRA_ENV_SETTINGS \ 56b8fa3d2aSJoseph Chen ENV_MEM_LAYOUT_SETTINGS \ 57b8fa3d2aSJoseph Chen "partitions=" PARTS_DEFAULT \ 58b8fa3d2aSJoseph Chen ROCKCHIP_DEVICE_SETTINGS \ 59b8fa3d2aSJoseph Chen RKIMG_DET_BOOTDEV \ 60b8fa3d2aSJoseph Chen BOOTENV 61b8fa3d2aSJoseph Chen #endif 62b8fa3d2aSJoseph Chen 63b8fa3d2aSJoseph Chen #endif /* __CONFIG_RK1808_COMMON_H */ 64