1 /* 2 * Configuation settings for the Renesas R7780MP board 3 * 4 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __R7780RP_H 11 #define __R7780RP_H 12 13 #undef DEBUG 14 #define CONFIG_SH4A 1 15 #define CONFIG_CPU_SH7780 1 16 #define CONFIG_R7780MP 1 17 #define CONFIG_SYS_R7780MP_OLD_FLASH 1 18 #define __LITTLE_ENDIAN__ 1 19 20 /* 21 * Command line configuration. 22 */ 23 #define CONFIG_CMD_SDRAM 24 #define CONFIG_CMD_FLASH 25 #define CONFIG_CMD_MEMORY 26 #define CONFIG_CMD_PCI 27 #define CONFIG_CMD_NET 28 #define CONFIG_CMD_PING 29 #define CONFIG_CMD_SAVEENV 30 #define CONFIG_CMD_NFS 31 #define CONFIG_CMD_IDE 32 #define CONFIG_CMD_EXT2 33 #define CONFIG_DOS_PARTITION 34 35 #define CONFIG_SCIF_CONSOLE 1 36 #define CONFIG_BAUDRATE 115200 37 #define CONFIG_CONS_SCIF0 1 38 39 #define CONFIG_BOOTDELAY 3 40 #define CONFIG_BOOTARGS "console=ttySC0,115200" 41 #define CONFIG_ENV_OVERWRITE 1 42 43 /* check for keypress on bootdelay==0 */ 44 /*#define CONFIG_ZERO_BOOTDELAY_CHECK*/ 45 46 #define CONFIG_SYS_TEXT_BASE 0x0FFC0000 47 #define CONFIG_SYS_SDRAM_BASE (0x08000000) 48 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 49 50 #define CONFIG_SYS_LONGHELP 51 #define CONFIG_SYS_CBSIZE 256 52 #define CONFIG_SYS_PBSIZE 256 53 #define CONFIG_SYS_MAXARGS 16 54 #define CONFIG_SYS_BARGSIZE 512 55 56 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 57 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 58 59 /* Flash board support */ 60 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 61 #ifdef CONFIG_SYS_R7780MP_OLD_FLASH 62 /* NOR Flash (S29PL127J60TFI130) */ 63 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 64 # define CONFIG_SYS_MAX_FLASH_BANKS (2) 65 # define CONFIG_SYS_MAX_FLASH_SECT 270 66 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ 67 CONFIG_SYS_FLASH_BASE + 0x100000,\ 68 CONFIG_SYS_FLASH_BASE + 0x400000,\ 69 CONFIG_SYS_FLASH_BASE + 0x700000, } 70 #else /* CONFIG_SYS_R7780MP_OLD_FLASH */ 71 /* NOR Flash (Spantion S29GL256P) */ 72 # define CONFIG_SYS_MAX_FLASH_BANKS (1) 73 # define CONFIG_SYS_MAX_FLASH_SECT 256 74 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 75 #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */ 76 77 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) 78 /* Address of u-boot image in Flash */ 79 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 80 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 81 /* Size of DRAM reserved for malloc() use */ 82 #define CONFIG_SYS_MALLOC_LEN (1204 * 1024) 83 84 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 85 #define CONFIG_SYS_RX_ETH_BUFFER (8) 86 87 #define CONFIG_SYS_FLASH_CFI 88 #define CONFIG_FLASH_CFI_DRIVER 89 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE 90 #undef CONFIG_SYS_FLASH_QUIET_TEST 91 /* print 'E' for empty sector on flinfo */ 92 #define CONFIG_SYS_FLASH_EMPTY_INFO 93 94 #define CONFIG_ENV_IS_IN_FLASH 95 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 96 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 97 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 98 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 99 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 100 101 /* Board Clock */ 102 #define CONFIG_SYS_CLK_FREQ 33333333 103 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 104 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 105 #define CONFIG_SYS_TMU_CLK_DIV 4 106 107 /* PCI Controller */ 108 #if defined(CONFIG_CMD_PCI) 109 #define CONFIG_PCI 110 #define CONFIG_SH4_PCI 111 #define CONFIG_SH7780_PCI 112 #define CONFIG_SH7780_PCI_LSR 0x07f00001 113 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE 114 #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE 115 #define CONFIG_PCI_PNP 116 #define CONFIG_PCI_SCAN_SHOW 1 117 #define __io 118 #define __mem_pci 119 120 #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ 121 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS 122 #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ 123 124 #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ 125 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS 126 #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ 127 #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE 128 #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE 129 #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE 130 #endif /* CONFIG_CMD_PCI */ 131 132 #if defined(CONFIG_CMD_NET) 133 /* 134 #define CONFIG_RTL8169 135 */ 136 /* AX88796L Support(NE2000 base chip) */ 137 #define CONFIG_DRIVER_AX88796L 138 #define CONFIG_DRIVER_NE2000_BASE 0xA4100000 139 #endif 140 141 /* Compact flash Support */ 142 #if defined(CONFIG_CMD_IDE) 143 #define CONFIG_IDE_RESET 1 144 #define CONFIG_SYS_PIO_MODE 1 145 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 146 #define CONFIG_SYS_IDE_MAXDEVICE 1 147 #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 148 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 149 #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ 150 #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ 151 #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ 152 #define CONFIG_IDE_SWAP_IO 153 #endif /* CONFIG_CMD_IDE */ 154 155 #endif /* __R7780RP_H */ 156