xref: /rk3399_rockchip-uboot/include/configs/r7780mp.h (revision 78d1e1d0a157c8b48ea19be6170b992745d30f38)
1 /*
2  * Configuation settings for the Renesas R7780MP board
3  *
4  * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5  * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __R7780RP_H
11 #define __R7780RP_H
12 
13 #undef DEBUG
14 #define CONFIG_CPU_SH7780	1
15 #define CONFIG_R7780MP		1
16 #define CONFIG_SYS_R7780MP_OLD_FLASH	1
17 #define __LITTLE_ENDIAN__ 1
18 
19 /*
20  * Command line configuration.
21  */
22 #define CONFIG_CMD_SDRAM
23 #define CONFIG_CMD_PCI
24 #define CONFIG_CMD_IDE
25 #define CONFIG_CMD_EXT2
26 #define CONFIG_DOS_PARTITION
27 
28 #define CONFIG_SCIF_CONSOLE	1
29 #define CONFIG_BAUDRATE		115200
30 #define CONFIG_CONS_SCIF0	1
31 
32 #define CONFIG_BOOTDELAY	3
33 #define CONFIG_BOOTARGS		"console=ttySC0,115200"
34 #define CONFIG_ENV_OVERWRITE	1
35 
36 /* check for keypress on bootdelay==0 */
37 /*#define CONFIG_ZERO_BOOTDELAY_CHECK*/
38 
39 #define CONFIG_SYS_TEXT_BASE		0x0FFC0000
40 #define CONFIG_SYS_SDRAM_BASE		(0x08000000)
41 #define CONFIG_SYS_SDRAM_SIZE		(128 * 1024 * 1024)
42 
43 #define CONFIG_SYS_LONGHELP
44 #define CONFIG_SYS_CBSIZE		256
45 #define CONFIG_SYS_PBSIZE		256
46 #define CONFIG_SYS_MAXARGS		16
47 #define CONFIG_SYS_BARGSIZE	512
48 
49 #define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE)
50 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
51 
52 /* Flash board support */
53 #define CONFIG_SYS_FLASH_BASE		(0xA0000000)
54 #ifdef CONFIG_SYS_R7780MP_OLD_FLASH
55 /* NOR Flash (S29PL127J60TFI130) */
56 # define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_32BIT
57 # define CONFIG_SYS_MAX_FLASH_BANKS	(2)
58 # define CONFIG_SYS_MAX_FLASH_SECT	270
59 # define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE,\
60 				CONFIG_SYS_FLASH_BASE + 0x100000,\
61 				CONFIG_SYS_FLASH_BASE + 0x400000,\
62 				CONFIG_SYS_FLASH_BASE + 0x700000, }
63 #else /* CONFIG_SYS_R7780MP_OLD_FLASH */
64 /* NOR Flash (Spantion S29GL256P) */
65 # define CONFIG_SYS_MAX_FLASH_BANKS	(1)
66 # define CONFIG_SYS_MAX_FLASH_SECT		256
67 # define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
68 #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */
69 
70 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
71 /* Address of u-boot image in Flash */
72 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
73 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
74 /* Size of DRAM reserved for malloc() use */
75 #define CONFIG_SYS_MALLOC_LEN		(1204 * 1024)
76 
77 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
78 #define CONFIG_SYS_RX_ETH_BUFFER	(8)
79 
80 #define CONFIG_SYS_FLASH_CFI
81 #define CONFIG_FLASH_CFI_DRIVER
82 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
83 #undef  CONFIG_SYS_FLASH_QUIET_TEST
84 /* print 'E' for empty sector on flinfo */
85 #define CONFIG_SYS_FLASH_EMPTY_INFO
86 
87 #define CONFIG_ENV_IS_IN_FLASH
88 #define CONFIG_ENV_SECT_SIZE	(256 * 1024)
89 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
90 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
91 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000
92 #define CONFIG_SYS_FLASH_WRITE_TOUT	500
93 
94 /* Board Clock */
95 #define CONFIG_SYS_CLK_FREQ	33333333
96 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
97 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
98 #define CONFIG_SYS_TMU_CLK_DIV		4
99 
100 /* PCI Controller */
101 #if defined(CONFIG_CMD_PCI)
102 #define CONFIG_PCI
103 #define CONFIG_SH4_PCI
104 #define CONFIG_SH7780_PCI
105 #define CONFIG_SH7780_PCI_LSR	0x07f00001
106 #define CONFIG_SH7780_PCI_LAR	CONFIG_SYS_SDRAM_SIZE
107 #define CONFIG_SH7780_PCI_BAR	CONFIG_SYS_SDRAM_SIZE
108 #define CONFIG_PCI_PNP
109 #define CONFIG_PCI_SCAN_SHOW	1
110 #define __io
111 #define __mem_pci
112 
113 #define CONFIG_PCI_MEM_BUS	0xFD000000	/* Memory space base addr */
114 #define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
115 #define CONFIG_PCI_MEM_SIZE	0x01000000	/* Size of Memory window */
116 
117 #define CONFIG_PCI_IO_BUS	0xFE200000	/* IO space base address */
118 #define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
119 #define CONFIG_PCI_IO_SIZE	0x00200000	/* Size of IO window */
120 #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
121 #define CONFIG_PCI_SYS_BUS  CONFIG_SYS_SDRAM_BASE
122 #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
123 #endif /* CONFIG_CMD_PCI */
124 
125 #if defined(CONFIG_CMD_NET)
126 /* AX88796L Support(NE2000 base chip) */
127 #define CONFIG_DRIVER_AX88796L
128 #define CONFIG_DRIVER_NE2000_BASE	0xA4100000
129 #endif
130 
131 /* Compact flash Support */
132 #if defined(CONFIG_CMD_IDE)
133 #define CONFIG_IDE_RESET        1
134 #define CONFIG_SYS_PIO_MODE            1
135 #define CONFIG_SYS_IDE_MAXBUS          1   /* IDE bus */
136 #define CONFIG_SYS_IDE_MAXDEVICE       1
137 #define CONFIG_SYS_ATA_BASE_ADDR       0xb4000000
138 #define CONFIG_SYS_ATA_STRIDE          2               /* 1bit shift */
139 #define CONFIG_SYS_ATA_DATA_OFFSET     0x1000          /* data reg offset */
140 #define CONFIG_SYS_ATA_REG_OFFSET      0x1000          /* reg offset */
141 #define CONFIG_SYS_ATA_ALT_OFFSET      0x800           /* alternate register offset */
142 #define CONFIG_IDE_SWAP_IO
143 #endif /* CONFIG_CMD_IDE */
144 
145 #endif /* __R7780RP_H */
146