1 /* 2 * Configuation settings for the Renesas Solutions r0p7734 board 3 * 4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __R0P7734_H 10 #define __R0P7734_H 11 12 #undef DEBUG 13 #define CONFIG_SH4A 1 14 #define CONFIG_CPU_SH7734 1 15 #define CONFIG_R0P7734 1 16 #define CONFIG_400MHZ_MODE 1 17 /* #define CONFIG_533MHZ_MODE 1 */ 18 19 #define CONFIG_BOARD_LATE_INIT 20 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 21 22 #define CONFIG_CMD_FLASH 23 #define CONFIG_CMD_MEMORY 24 #define CONFIG_CMD_NET 25 #define CONFIG_CMD_PING 26 #define CONFIG_CMD_MII 27 #define CONFIG_CMD_NFS 28 #define CONFIG_CMD_SDRAM 29 #define CONFIG_CMD_ENV 30 #define CONFIG_CMD_SAVEENV 31 32 #define CONFIG_BAUDRATE 115200 33 #define CONFIG_BOOTDELAY 3 34 #define CONFIG_BOOTARGS "console=ttySC3,115200" 35 36 #define CONFIG_VERSION_VARIABLE 37 #undef CONFIG_SHOW_BOOT_PROGRESS 38 39 /* Ether */ 40 #define CONFIG_SH_ETHER 1 41 #define CONFIG_SH_ETHER_USE_PORT (0) 42 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 43 #define CONFIG_PHYLIB 44 #define CONFIG_PHY_SMSC 1 45 #define CONFIG_BITBANGMII 46 #define CONFIG_BITBANGMII_MULTI 47 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */ 48 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 49 #ifndef CONFIG_SH_ETHER 50 # define CONFIG_SMC911X 51 # define CONFIG_SMC911X_16_BIT 52 # define CONFIG_SMC911X_BASE (0x84000000) 53 #endif 54 55 56 /* I2C */ 57 #define CONFIG_CMD_I2C 58 #define CONFIG_SH_SH7734_I2C 1 59 #define CONFIG_HARD_I2C 1 60 #define CONFIG_I2C_MULTI_BUS 1 61 #define CONFIG_SYS_MAX_I2C_BUS 2 62 #define CONFIG_SYS_I2C_MODULE 0 63 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ 64 #define CONFIG_SYS_I2C_SLAVE 0x50 65 #define CONFIG_SH_I2C_DATA_HIGH 4 66 #define CONFIG_SH_I2C_DATA_LOW 5 67 #define CONFIG_SH_I2C_CLOCK 500000000 68 #define CONFIG_SH_I2C_BASE0 0xFFC70000 69 #define CONFIG_SH_I2C_BASE1 0xFFC7100 70 71 /* undef to save memory */ 72 #define CONFIG_SYS_LONGHELP 73 /* Monitor Command Prompt */ 74 /* Buffer size for input from the Console */ 75 #define CONFIG_SYS_CBSIZE 256 76 /* Buffer size for Console output */ 77 #define CONFIG_SYS_PBSIZE 256 78 /* max args accepted for monitor commands */ 79 #define CONFIG_SYS_MAXARGS 16 80 /* Buffer size for Boot Arguments passed to kernel */ 81 #define CONFIG_SYS_BARGSIZE 512 82 /* List of legal baudrate settings for this board */ 83 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 84 85 /* SCIF */ 86 #define CONFIG_SCIF_CONSOLE 1 87 #define CONFIG_SCIF 1 88 #define CONFIG_CONS_SCIF3 1 89 90 /* Suppress display of console information at boot */ 91 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 92 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 93 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 94 95 /* SDRAM */ 96 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 97 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 98 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 99 100 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 101 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024) 102 /* Enable alternate, more extensive, memory test */ 103 #undef CONFIG_SYS_ALT_MEMTEST 104 /* Scratch address used by the alternate memory test */ 105 #undef CONFIG_SYS_MEMTEST_SCRATCH 106 107 /* Enable temporary baudrate change while serial download */ 108 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 109 110 /* FLASH */ 111 #define CONFIG_FLASH_CFI_DRIVER 1 112 #define CONFIG_SYS_FLASH_CFI 113 #undef CONFIG_SYS_FLASH_QUIET_TEST 114 #define CONFIG_SYS_FLASH_EMPTY_INFO 115 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 116 #define CONFIG_SYS_MAX_FLASH_SECT 512 117 118 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 119 #define CONFIG_SYS_MAX_FLASH_BANKS 1 120 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 121 122 /* Timeout for Flash erase operations (in ms) */ 123 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 124 /* Timeout for Flash write operations (in ms) */ 125 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 126 /* Timeout for Flash set sector lock bit operations (in ms) */ 127 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 128 /* Timeout for Flash clear lock bit operations (in ms) */ 129 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 130 131 /* 132 * Use hardware flash sectors protection instead 133 * of U-Boot software protection 134 */ 135 #undef CONFIG_SYS_FLASH_PROTECTION 136 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 137 138 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 139 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 140 /* Monitor size */ 141 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 142 /* Size of DRAM reserved for malloc() use */ 143 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 144 /* size in bytes reserved for initial data */ 145 #define CONFIG_SYS_GBL_DATA_SIZE (256) 146 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 147 148 /* ENV setting */ 149 #define CONFIG_ENV_IS_IN_FLASH 150 #define CONFIG_ENV_OVERWRITE 1 151 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 152 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 153 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 154 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 155 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 156 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 157 158 /* Board Clock */ 159 #if defined(CONFIG_400MHZ_MODE) 160 #define CONFIG_SYS_CLK_FREQ 50000000 161 #else 162 #define CONFIG_SYS_CLK_FREQ 44444444 163 #endif 164 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 165 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 166 #define CONFIG_SYS_TMU_CLK_DIV 4 167 168 #endif /* __R0P7734_H */ 169