1 /* 2 * Configuation settings for the Renesas Solutions r0p7734 board 3 * 4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __R0P7734_H 10 #define __R0P7734_H 11 12 #undef DEBUG 13 #define CONFIG_SH4 1 14 #define CONFIG_SH4A 1 15 #define CONFIG_CPU_SH7734 1 16 #define CONFIG_R0P7734 1 17 #define CONFIG_400MHZ_MODE 1 18 /* #define CONFIG_533MHZ_MODE 1 */ 19 20 #define CONFIG_BOARD_LATE_INIT 21 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 22 23 #define CONFIG_CMD_FLASH 24 #define CONFIG_CMD_MEMORY 25 #define CONFIG_CMD_NET 26 #define CONFIG_CMD_PING 27 #define CONFIG_CMD_MII 28 #define CONFIG_CMD_NFS 29 #define CONFIG_CMD_SDRAM 30 #define CONFIG_CMD_ENV 31 #define CONFIG_CMD_SAVEENV 32 33 #define CONFIG_BAUDRATE 115200 34 #define CONFIG_BOOTDELAY 3 35 #define CONFIG_BOOTARGS "console=ttySC3,115200" 36 37 #define CONFIG_VERSION_VARIABLE 38 #undef CONFIG_SHOW_BOOT_PROGRESS 39 40 /* Ether */ 41 #define CONFIG_SH_ETHER 1 42 #define CONFIG_SH_ETHER_USE_PORT (0) 43 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 44 #define CONFIG_PHYLIB 45 #define CONFIG_PHY_SMSC 1 46 #define CONFIG_BITBANGMII 47 #define CONFIG_BITBANGMII_MULTI 48 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */ 49 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 50 #ifndef CONFIG_SH_ETHER 51 # define CONFIG_SMC911X 52 # define CONFIG_SMC911X_16_BIT 53 # define CONFIG_SMC911X_BASE (0x84000000) 54 #endif 55 56 57 /* I2C */ 58 #define CONFIG_CMD_I2C 59 #define CONFIG_SH_SH7734_I2C 1 60 #define CONFIG_HARD_I2C 1 61 #define CONFIG_I2C_MULTI_BUS 1 62 #define CONFIG_SYS_MAX_I2C_BUS 2 63 #define CONFIG_SYS_I2C_MODULE 0 64 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ 65 #define CONFIG_SYS_I2C_SLAVE 0x50 66 #define CONFIG_SH_I2C_DATA_HIGH 4 67 #define CONFIG_SH_I2C_DATA_LOW 5 68 #define CONFIG_SH_I2C_CLOCK 500000000 69 #define CONFIG_SH_I2C_BASE0 0xFFC70000 70 #define CONFIG_SH_I2C_BASE1 0xFFC7100 71 72 /* undef to save memory */ 73 #define CONFIG_SYS_LONGHELP 74 /* Monitor Command Prompt */ 75 /* Buffer size for input from the Console */ 76 #define CONFIG_SYS_CBSIZE 256 77 /* Buffer size for Console output */ 78 #define CONFIG_SYS_PBSIZE 256 79 /* max args accepted for monitor commands */ 80 #define CONFIG_SYS_MAXARGS 16 81 /* Buffer size for Boot Arguments passed to kernel */ 82 #define CONFIG_SYS_BARGSIZE 512 83 /* List of legal baudrate settings for this board */ 84 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 85 86 /* SCIF */ 87 #define CONFIG_SCIF_CONSOLE 1 88 #define CONFIG_SCIF 1 89 #define CONFIG_CONS_SCIF3 1 90 91 /* Suppress display of console information at boot */ 92 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 93 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 94 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 95 96 /* SDRAM */ 97 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 98 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 99 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 100 101 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 102 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024) 103 /* Enable alternate, more extensive, memory test */ 104 #undef CONFIG_SYS_ALT_MEMTEST 105 /* Scratch address used by the alternate memory test */ 106 #undef CONFIG_SYS_MEMTEST_SCRATCH 107 108 /* Enable temporary baudrate change while serial download */ 109 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 110 111 /* FLASH */ 112 #define CONFIG_FLASH_CFI_DRIVER 1 113 #define CONFIG_SYS_FLASH_CFI 114 #undef CONFIG_SYS_FLASH_QUIET_TEST 115 #define CONFIG_SYS_FLASH_EMPTY_INFO 116 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 117 #define CONFIG_SYS_MAX_FLASH_SECT 512 118 119 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 120 #define CONFIG_SYS_MAX_FLASH_BANKS 1 121 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 122 123 /* Timeout for Flash erase operations (in ms) */ 124 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 125 /* Timeout for Flash write operations (in ms) */ 126 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 127 /* Timeout for Flash set sector lock bit operations (in ms) */ 128 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 129 /* Timeout for Flash clear lock bit operations (in ms) */ 130 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 131 132 /* 133 * Use hardware flash sectors protection instead 134 * of U-Boot software protection 135 */ 136 #undef CONFIG_SYS_FLASH_PROTECTION 137 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 138 139 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 140 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 141 /* Monitor size */ 142 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 143 /* Size of DRAM reserved for malloc() use */ 144 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 145 /* size in bytes reserved for initial data */ 146 #define CONFIG_SYS_GBL_DATA_SIZE (256) 147 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 148 149 /* ENV setting */ 150 #define CONFIG_ENV_IS_IN_FLASH 151 #define CONFIG_ENV_OVERWRITE 1 152 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 153 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 154 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 155 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 156 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 157 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 158 159 /* Board Clock */ 160 #if defined(CONFIG_400MHZ_MODE) 161 #define CONFIG_SYS_CLK_FREQ 50000000 162 #else 163 #define CONFIG_SYS_CLK_FREQ 44444444 164 #endif 165 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 166 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 167 #define CONFIG_SYS_TMU_CLK_DIV 4 168 169 #endif /* __R0P7734_H */ 170