1 /* 2 * Configuation settings for the Renesas Solutions r0p7734 board 3 * 4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __R0P7734_H 10 #define __R0P7734_H 11 12 #define CONFIG_CPU_SH7734 1 13 #define CONFIG_R0P7734 1 14 #define CONFIG_400MHZ_MODE 1 15 /* #define CONFIG_533MHZ_MODE 1 */ 16 17 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 18 19 #define CONFIG_DISPLAY_BOARDINFO 20 #undef CONFIG_SHOW_BOOT_PROGRESS 21 22 /* Ether */ 23 #define CONFIG_SH_ETHER 1 24 #define CONFIG_SH_ETHER_USE_PORT (0) 25 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 26 #define CONFIG_PHY_SMSC 1 27 #define CONFIG_BITBANGMII 28 #define CONFIG_BITBANGMII_MULTI 29 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */ 30 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 31 #ifndef CONFIG_SH_ETHER 32 # define CONFIG_SMC911X 33 # define CONFIG_SMC911X_16_BIT 34 # define CONFIG_SMC911X_BASE (0x84000000) 35 #endif 36 37 /* undef to save memory */ 38 #define CONFIG_SYS_LONGHELP 39 /* max args accepted for monitor commands */ 40 #define CONFIG_SYS_MAXARGS 16 41 /* Buffer size for Boot Arguments passed to kernel */ 42 #define CONFIG_SYS_BARGSIZE 512 43 /* List of legal baudrate settings for this board */ 44 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 45 46 /* SCIF */ 47 #define CONFIG_SCIF 1 48 #define CONFIG_CONS_SCIF3 1 49 50 /* Suppress display of console information at boot */ 51 52 /* SDRAM */ 53 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 54 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 55 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 56 57 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 58 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024) 59 /* Enable alternate, more extensive, memory test */ 60 #undef CONFIG_SYS_ALT_MEMTEST 61 /* Scratch address used by the alternate memory test */ 62 #undef CONFIG_SYS_MEMTEST_SCRATCH 63 64 /* Enable temporary baudrate change while serial download */ 65 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 66 67 /* FLASH */ 68 #define CONFIG_FLASH_CFI_DRIVER 1 69 #define CONFIG_SYS_FLASH_CFI 70 #undef CONFIG_SYS_FLASH_QUIET_TEST 71 #define CONFIG_SYS_FLASH_EMPTY_INFO 72 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 73 #define CONFIG_SYS_MAX_FLASH_SECT 512 74 75 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 76 #define CONFIG_SYS_MAX_FLASH_BANKS 1 77 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 78 79 /* Timeout for Flash erase operations (in ms) */ 80 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 81 /* Timeout for Flash write operations (in ms) */ 82 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 83 /* Timeout for Flash set sector lock bit operations (in ms) */ 84 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 85 /* Timeout for Flash clear lock bit operations (in ms) */ 86 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 87 88 /* 89 * Use hardware flash sectors protection instead 90 * of U-Boot software protection 91 */ 92 #undef CONFIG_SYS_FLASH_PROTECTION 93 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 94 95 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 96 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 97 /* Monitor size */ 98 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 99 /* Size of DRAM reserved for malloc() use */ 100 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 101 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 102 103 /* ENV setting */ 104 #define CONFIG_ENV_OVERWRITE 1 105 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 106 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 107 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 108 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 109 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 110 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 111 112 /* Board Clock */ 113 #if defined(CONFIG_400MHZ_MODE) 114 #define CONFIG_SYS_CLK_FREQ 50000000 115 #else 116 #define CONFIG_SYS_CLK_FREQ 44444444 117 #endif 118 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 119 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 120 #define CONFIG_SYS_TMU_CLK_DIV 4 121 122 #endif /* __R0P7734_H */ 123