1*60c0467aSVladimir Barinov /* 2*60c0467aSVladimir Barinov * include/configs/porter.h 3*60c0467aSVladimir Barinov * This file is Porter board configuration. 4*60c0467aSVladimir Barinov * 5*60c0467aSVladimir Barinov * Copyright (C) 2015 Renesas Electronics Corporation 6*60c0467aSVladimir Barinov * Copyright (C) 2015 Cogent Embedded, Inc. 7*60c0467aSVladimir Barinov * 8*60c0467aSVladimir Barinov * SPDX-License-Identifier: GPL-2.0 9*60c0467aSVladimir Barinov */ 10*60c0467aSVladimir Barinov 11*60c0467aSVladimir Barinov #ifndef __PORTER_H 12*60c0467aSVladimir Barinov #define __PORTER_H 13*60c0467aSVladimir Barinov 14*60c0467aSVladimir Barinov #undef DEBUG 15*60c0467aSVladimir Barinov #define CONFIG_R8A7791 16*60c0467aSVladimir Barinov #define CONFIG_RMOBILE_BOARD_STRING "Porter" 17*60c0467aSVladimir Barinov 18*60c0467aSVladimir Barinov #include "rcar-gen2-common.h" 19*60c0467aSVladimir Barinov 20*60c0467aSVladimir Barinov #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 21*60c0467aSVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0x70000000 22*60c0467aSVladimir Barinov #else 23*60c0467aSVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0xE6304000 24*60c0467aSVladimir Barinov #endif 25*60c0467aSVladimir Barinov 26*60c0467aSVladimir Barinov #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 27*60c0467aSVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC 28*60c0467aSVladimir Barinov #else 29*60c0467aSVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC 30*60c0467aSVladimir Barinov #endif 31*60c0467aSVladimir Barinov #define STACK_AREA_SIZE 0xC000 32*60c0467aSVladimir Barinov #define LOW_LEVEL_MERAM_STACK \ 33*60c0467aSVladimir Barinov (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 34*60c0467aSVladimir Barinov 35*60c0467aSVladimir Barinov /* MEMORY */ 36*60c0467aSVladimir Barinov #define RCAR_GEN2_SDRAM_BASE 0x40000000 37*60c0467aSVladimir Barinov #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) 38*60c0467aSVladimir Barinov #define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024) 39*60c0467aSVladimir Barinov 40*60c0467aSVladimir Barinov /* SCIF */ 41*60c0467aSVladimir Barinov #define CONFIG_SCIF_CONSOLE 42*60c0467aSVladimir Barinov 43*60c0467aSVladimir Barinov /* FLASH */ 44*60c0467aSVladimir Barinov #define CONFIG_SPI 45*60c0467aSVladimir Barinov #define CONFIG_SPI_FLASH_BAR 46*60c0467aSVladimir Barinov #define CONFIG_SH_QSPI 47*60c0467aSVladimir Barinov #define CONFIG_SPI_FLASH 48*60c0467aSVladimir Barinov #define CONFIG_SPI_FLASH_SPANSION 49*60c0467aSVladimir Barinov #define CONFIG_SPI_FLASH_QUAD 50*60c0467aSVladimir Barinov #define CONFIG_SYS_NO_FLASH 51*60c0467aSVladimir Barinov 52*60c0467aSVladimir Barinov /* SH Ether */ 53*60c0467aSVladimir Barinov #define CONFIG_NET_MULTI 54*60c0467aSVladimir Barinov #define CONFIG_SH_ETHER 55*60c0467aSVladimir Barinov #define CONFIG_SH_ETHER_USE_PORT 0 56*60c0467aSVladimir Barinov #define CONFIG_SH_ETHER_PHY_ADDR 0x1 57*60c0467aSVladimir Barinov #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 58*60c0467aSVladimir Barinov #define CONFIG_SH_ETHER_CACHE_WRITEBACK 59*60c0467aSVladimir Barinov #define CONFIG_SH_ETHER_CACHE_INVALIDATE 60*60c0467aSVladimir Barinov #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 61*60c0467aSVladimir Barinov #define CONFIG_PHYLIB 62*60c0467aSVladimir Barinov #define CONFIG_PHY_MICREL 63*60c0467aSVladimir Barinov #define CONFIG_BITBANGMII 64*60c0467aSVladimir Barinov #define CONFIG_BITBANGMII_MULTI 65*60c0467aSVladimir Barinov 66*60c0467aSVladimir Barinov /* Board Clock */ 67*60c0467aSVladimir Barinov #define RMOBILE_XTAL_CLK 20000000u 68*60c0467aSVladimir Barinov #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 69*60c0467aSVladimir Barinov #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 70*60c0467aSVladimir Barinov #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 71*60c0467aSVladimir Barinov #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) 72*60c0467aSVladimir Barinov 73*60c0467aSVladimir Barinov #define CONFIG_SYS_TMU_CLK_DIV 4 74*60c0467aSVladimir Barinov 75*60c0467aSVladimir Barinov /* i2c */ 76*60c0467aSVladimir Barinov #define CONFIG_CMD_I2C 77*60c0467aSVladimir Barinov #define CONFIG_SYS_I2C 78*60c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH 79*60c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SLAVE 0x7F 80*60c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 81*60c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH_SPEED0 400000 82*60c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH_SPEED1 400000 83*60c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH_SPEED2 400000 84*60c0467aSVladimir Barinov #define CONFIG_SH_I2C_DATA_HIGH 4 85*60c0467aSVladimir Barinov #define CONFIG_SH_I2C_DATA_LOW 5 86*60c0467aSVladimir Barinov #define CONFIG_SH_I2C_CLOCK 10000000 87*60c0467aSVladimir Barinov 88*60c0467aSVladimir Barinov #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 89*60c0467aSVladimir Barinov 90*60c0467aSVladimir Barinov /* USB */ 91*60c0467aSVladimir Barinov #define CONFIG_USB_EHCI 92*60c0467aSVladimir Barinov #define CONFIG_USB_EHCI_RMOBILE 93*60c0467aSVladimir Barinov #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 94*60c0467aSVladimir Barinov #define CONFIG_USB_STORAGE 95*60c0467aSVladimir Barinov 96*60c0467aSVladimir Barinov /* SD */ 97*60c0467aSVladimir Barinov #define CONFIG_MMC 98*60c0467aSVladimir Barinov #define CONFIG_CMD_MMC 99*60c0467aSVladimir Barinov #define CONFIG_GENERIC_MMC 100*60c0467aSVladimir Barinov #define CONFIG_SH_SDHI_FREQ 97500000 101*60c0467aSVladimir Barinov 102*60c0467aSVladimir Barinov /* Module stop status bits */ 103*60c0467aSVladimir Barinov /* INTC-RT */ 104*60c0467aSVladimir Barinov #define CONFIG_SMSTP0_ENA 0x00400000 105*60c0467aSVladimir Barinov /* MSIF */ 106*60c0467aSVladimir Barinov #define CONFIG_SMSTP2_ENA 0x00002000 107*60c0467aSVladimir Barinov /* INTC-SYS, IRQC */ 108*60c0467aSVladimir Barinov #define CONFIG_SMSTP4_ENA 0x00000180 109*60c0467aSVladimir Barinov /* SCIF0 */ 110*60c0467aSVladimir Barinov #define CONFIG_SMSTP7_ENA 0x00200000 111*60c0467aSVladimir Barinov 112*60c0467aSVladimir Barinov #endif /* __PORTER_H */ 113