160c0467aSVladimir Barinov /* 260c0467aSVladimir Barinov * include/configs/porter.h 360c0467aSVladimir Barinov * This file is Porter board configuration. 460c0467aSVladimir Barinov * 560c0467aSVladimir Barinov * Copyright (C) 2015 Renesas Electronics Corporation 660c0467aSVladimir Barinov * Copyright (C) 2015 Cogent Embedded, Inc. 760c0467aSVladimir Barinov * 860c0467aSVladimir Barinov * SPDX-License-Identifier: GPL-2.0 960c0467aSVladimir Barinov */ 1060c0467aSVladimir Barinov 1160c0467aSVladimir Barinov #ifndef __PORTER_H 1260c0467aSVladimir Barinov #define __PORTER_H 1360c0467aSVladimir Barinov 1460c0467aSVladimir Barinov #undef DEBUG 1560c0467aSVladimir Barinov #define CONFIG_R8A7791 16*1cc95f6eSNobuhiro Iwamatsu #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Porter" 1760c0467aSVladimir Barinov 1860c0467aSVladimir Barinov #include "rcar-gen2-common.h" 1960c0467aSVladimir Barinov 20*1cc95f6eSNobuhiro Iwamatsu #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) 2160c0467aSVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0x70000000 2260c0467aSVladimir Barinov #else 2360c0467aSVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0xE6304000 2460c0467aSVladimir Barinov #endif 2560c0467aSVladimir Barinov 26*1cc95f6eSNobuhiro Iwamatsu #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) 2760c0467aSVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC 2860c0467aSVladimir Barinov #else 2960c0467aSVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC 3060c0467aSVladimir Barinov #endif 3160c0467aSVladimir Barinov #define STACK_AREA_SIZE 0xC000 3260c0467aSVladimir Barinov #define LOW_LEVEL_MERAM_STACK \ 3360c0467aSVladimir Barinov (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 3460c0467aSVladimir Barinov 3560c0467aSVladimir Barinov /* MEMORY */ 3660c0467aSVladimir Barinov #define RCAR_GEN2_SDRAM_BASE 0x40000000 3760c0467aSVladimir Barinov #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) 3860c0467aSVladimir Barinov #define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024) 3960c0467aSVladimir Barinov 4060c0467aSVladimir Barinov /* FLASH */ 4160c0467aSVladimir Barinov #define CONFIG_SPI_FLASH_QUAD 4260c0467aSVladimir Barinov 4360c0467aSVladimir Barinov /* SH Ether */ 4460c0467aSVladimir Barinov #define CONFIG_SH_ETHER 4560c0467aSVladimir Barinov #define CONFIG_SH_ETHER_USE_PORT 0 4660c0467aSVladimir Barinov #define CONFIG_SH_ETHER_PHY_ADDR 0x1 4760c0467aSVladimir Barinov #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 4860c0467aSVladimir Barinov #define CONFIG_SH_ETHER_CACHE_WRITEBACK 4960c0467aSVladimir Barinov #define CONFIG_SH_ETHER_CACHE_INVALIDATE 5060c0467aSVladimir Barinov #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 5160c0467aSVladimir Barinov #define CONFIG_BITBANGMII 5260c0467aSVladimir Barinov #define CONFIG_BITBANGMII_MULTI 5360c0467aSVladimir Barinov 5460c0467aSVladimir Barinov /* Board Clock */ 5560c0467aSVladimir Barinov #define RMOBILE_XTAL_CLK 20000000u 5660c0467aSVladimir Barinov #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 5760c0467aSVladimir Barinov #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 5860c0467aSVladimir Barinov #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 5960c0467aSVladimir Barinov #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) 6060c0467aSVladimir Barinov 6160c0467aSVladimir Barinov #define CONFIG_SYS_TMU_CLK_DIV 4 6260c0467aSVladimir Barinov 6360c0467aSVladimir Barinov /* i2c */ 6460c0467aSVladimir Barinov #define CONFIG_SYS_I2C 6560c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH 6660c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SLAVE 0x7F 6760c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 6860c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH_SPEED0 400000 6960c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH_SPEED1 400000 7060c0467aSVladimir Barinov #define CONFIG_SYS_I2C_SH_SPEED2 400000 7160c0467aSVladimir Barinov #define CONFIG_SH_I2C_DATA_HIGH 4 7260c0467aSVladimir Barinov #define CONFIG_SH_I2C_DATA_LOW 5 7360c0467aSVladimir Barinov #define CONFIG_SH_I2C_CLOCK 10000000 7460c0467aSVladimir Barinov 7560c0467aSVladimir Barinov #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 7660c0467aSVladimir Barinov 7760c0467aSVladimir Barinov /* USB */ 7860c0467aSVladimir Barinov #define CONFIG_USB_EHCI_RMOBILE 7960c0467aSVladimir Barinov #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 8060c0467aSVladimir Barinov 8160c0467aSVladimir Barinov /* SD */ 8260c0467aSVladimir Barinov #define CONFIG_SH_SDHI_FREQ 97500000 8360c0467aSVladimir Barinov 8460c0467aSVladimir Barinov /* Module stop status bits */ 8560c0467aSVladimir Barinov /* INTC-RT */ 8660c0467aSVladimir Barinov #define CONFIG_SMSTP0_ENA 0x00400000 8760c0467aSVladimir Barinov /* MSIF */ 8860c0467aSVladimir Barinov #define CONFIG_SMSTP2_ENA 0x00002000 8960c0467aSVladimir Barinov /* INTC-SYS, IRQC */ 9060c0467aSVladimir Barinov #define CONFIG_SMSTP4_ENA 0x00000180 9160c0467aSVladimir Barinov /* SCIF0 */ 9260c0467aSVladimir Barinov #define CONFIG_SMSTP7_ENA 0x00200000 9360c0467aSVladimir Barinov 9460c0467aSVladimir Barinov #endif /* __PORTER_H */ 95