15d6050fdSStefan Roese /* 25d6050fdSStefan Roese * Copyright (C) 2014, Barco (www.barco.com) 35d6050fdSStefan Roese * 45d6050fdSStefan Roese * SPDX-License-Identifier: GPL-2.0+ 55d6050fdSStefan Roese */ 65d6050fdSStefan Roese 75d6050fdSStefan Roese #ifndef __PLATINUM_CONFIG_H__ 85d6050fdSStefan Roese #define __PLATINUM_CONFIG_H__ 95d6050fdSStefan Roese 105d6050fdSStefan Roese /* SPL */ 115d6050fdSStefan Roese #define CONFIG_SPL_NAND_SUPPORT 125d6050fdSStefan Roese #define CONFIG_SPL_MMC_SUPPORT 135d6050fdSStefan Roese 145d6050fdSStefan Roese /* Location in NAND to read U-Boot from */ 155d6050fdSStefan Roese #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * 1024 * 1024) 165d6050fdSStefan Roese 175d6050fdSStefan Roese #include "imx6_spl.h" /* common IMX6 SPL configuration */ 185d6050fdSStefan Roese #include "mx6_common.h" 195d6050fdSStefan Roese 205d6050fdSStefan Roese /* 215d6050fdSStefan Roese * Console configuration 225d6050fdSStefan Roese */ 235d6050fdSStefan Roese 245d6050fdSStefan Roese #define CONFIG_CMD_BMODE 255d6050fdSStefan Roese #define CONFIG_CMD_DHCP 265d6050fdSStefan Roese #define CONFIG_CMD_I2C 275d6050fdSStefan Roese #define CONFIG_CMD_MII 285d6050fdSStefan Roese #define CONFIG_CMD_MTDPARTS 295d6050fdSStefan Roese #define CONFIG_CMD_NAND 305d6050fdSStefan Roese #define CONFIG_CMD_NAND_TRIMFFS 315d6050fdSStefan Roese #define CONFIG_CMD_PING 325d6050fdSStefan Roese #define CONFIG_CMD_TIME 335d6050fdSStefan Roese #define CONFIG_CMD_UBI 345d6050fdSStefan Roese #define CONFIG_CMD_UBIFS 355d6050fdSStefan Roese #define CONFIG_CMD_USB 365d6050fdSStefan Roese 375d6050fdSStefan Roese /* 385d6050fdSStefan Roese * Hardware configuration 395d6050fdSStefan Roese */ 405d6050fdSStefan Roese 415d6050fdSStefan Roese /* UART config */ 425d6050fdSStefan Roese #define CONFIG_MXC_UART 435d6050fdSStefan Roese #define CONFIG_MXC_UART_BASE UART1_BASE 445d6050fdSStefan Roese 455d6050fdSStefan Roese /* I2C config */ 465d6050fdSStefan Roese #define CONFIG_SYS_I2C 475d6050fdSStefan Roese #define CONFIG_SYS_I2C_MXC 48*03544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 49*03544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 50f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 515d6050fdSStefan Roese #define CONFIG_SYS_I2C_SPEED 100000 525d6050fdSStefan Roese 535d6050fdSStefan Roese /* MMC config */ 545d6050fdSStefan Roese #define CONFIG_SYS_FSL_ESDHC_ADDR 0 555d6050fdSStefan Roese #define CONFIG_SYS_FSL_USDHC_NUM 1 565d6050fdSStefan Roese 575d6050fdSStefan Roese /* Ethernet config */ 585d6050fdSStefan Roese #define CONFIG_FEC_MXC 595d6050fdSStefan Roese #define CONFIG_MII 605d6050fdSStefan Roese #define IMX_FEC_BASE ENET_BASE_ADDR 615d6050fdSStefan Roese 625d6050fdSStefan Roese #define CONFIG_PHYLIB 635d6050fdSStefan Roese 645d6050fdSStefan Roese /* USB config */ 655d6050fdSStefan Roese #define CONFIG_USB_EHCI 665d6050fdSStefan Roese #define CONFIG_USB_EHCI_MX6 675d6050fdSStefan Roese #define CONFIG_USB_STORAGE 685d6050fdSStefan Roese #define CONFIG_MXC_USB_PORT 1 695d6050fdSStefan Roese #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 705d6050fdSStefan Roese #define CONFIG_MXC_USB_FLAGS 0 715d6050fdSStefan Roese 725d6050fdSStefan Roese /* Memory config */ 735d6050fdSStefan Roese #define CONFIG_NR_DRAM_BANKS 1 745d6050fdSStefan Roese #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 755d6050fdSStefan Roese #ifndef PHYS_SDRAM_SIZE 765d6050fdSStefan Roese #define PHYS_SDRAM_SIZE (1024 << 20) 775d6050fdSStefan Roese #endif 785d6050fdSStefan Roese 795d6050fdSStefan Roese #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 805d6050fdSStefan Roese #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 815d6050fdSStefan Roese #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 825d6050fdSStefan Roese 835d6050fdSStefan Roese #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 845d6050fdSStefan Roese GENERATED_GBL_DATA_SIZE) 855d6050fdSStefan Roese #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 865d6050fdSStefan Roese CONFIG_SYS_INIT_SP_OFFSET) 875d6050fdSStefan Roese 885d6050fdSStefan Roese #define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024) 895d6050fdSStefan Roese 905d6050fdSStefan Roese #ifdef CONFIG_CMD_NAND 915d6050fdSStefan Roese 925d6050fdSStefan Roese /* NAND config */ 935d6050fdSStefan Roese #define CONFIG_NAND_MXS 945d6050fdSStefan Roese #ifndef CONFIG_SYS_NAND_MAX_CHIPS 955d6050fdSStefan Roese #define CONFIG_SYS_NAND_MAX_CHIPS 2 965d6050fdSStefan Roese #endif 975d6050fdSStefan Roese #define CONFIG_SYS_MAX_NAND_DEVICE 1 985d6050fdSStefan Roese #define CONFIG_SYS_NAND_BASE 0x40000000 995d6050fdSStefan Roese #define CONFIG_SYS_NAND_5_ADDR_CYCLE 1005d6050fdSStefan Roese #define CONFIG_SYS_NAND_ONFI_DETECTION 1015d6050fdSStefan Roese 1025d6050fdSStefan Roese /* DMA config, needed for GPMI/MXS NAND support */ 1035d6050fdSStefan Roese #define CONFIG_APBH_DMA 1045d6050fdSStefan Roese #define CONFIG_APBH_DMA_BURST 1055d6050fdSStefan Roese #define CONFIG_APBH_DMA_BURST8 1065d6050fdSStefan Roese 1075d6050fdSStefan Roese /* Environment in NAND */ 1085d6050fdSStefan Roese #define CONFIG_ENV_IS_IN_NAND 1095d6050fdSStefan Roese #define CONFIG_ENV_OFFSET (16 << 20) 1105d6050fdSStefan Roese #define CONFIG_ENV_SECT_SIZE (128 << 10) 1115d6050fdSStefan Roese #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 1125d6050fdSStefan Roese #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10)) 1135d6050fdSStefan Roese #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 1145d6050fdSStefan Roese 1155d6050fdSStefan Roese #else /* CONFIG_CMD_NAND */ 1165d6050fdSStefan Roese 1175d6050fdSStefan Roese /* Environment in MMC */ 1185d6050fdSStefan Roese #define CONFIG_ENV_SIZE (8 << 10) 1195d6050fdSStefan Roese #define CONFIG_ENV_IS_IN_MMC 1205d6050fdSStefan Roese #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 1215d6050fdSStefan Roese #define CONFIG_SYS_MMC_ENV_DEV 0 1225d6050fdSStefan Roese 1235d6050fdSStefan Roese #endif /* CONFIG_CMD_NAND */ 1245d6050fdSStefan Roese 1255d6050fdSStefan Roese /* 1265d6050fdSStefan Roese * U-Boot configuration 1275d6050fdSStefan Roese */ 1285d6050fdSStefan Roese 1295d6050fdSStefan Roese /* Board startup config */ 1305d6050fdSStefan Roese #define CONFIG_BOARD_EARLY_INIT_F 1315d6050fdSStefan Roese #define CONFIG_MISC_INIT_R 1325d6050fdSStefan Roese 1335d6050fdSStefan Roese #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1345d6050fdSStefan Roese #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 1355d6050fdSStefan Roese PHYS_SDRAM_SIZE - (12 << 20)) 1365d6050fdSStefan Roese 1375d6050fdSStefan Roese #define CONFIG_BOOTCOMMAND "run bootubi_scr" 1385d6050fdSStefan Roese 1395d6050fdSStefan Roese /* Miscellaneous configurable options */ 1405d6050fdSStefan Roese #define CONFIG_PREBOOT 1415d6050fdSStefan Roese 1425d6050fdSStefan Roese /* Print Buffer Size */ 1435d6050fdSStefan Roese #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 1445d6050fdSStefan Roese sizeof(CONFIG_SYS_PROMPT) + 16) 1455d6050fdSStefan Roese 1465d6050fdSStefan Roese /* MTD/UBI/UBIFS config */ 1475d6050fdSStefan Roese #define CONFIG_LZO 1485d6050fdSStefan Roese #define CONFIG_MTD_DEVICE 1495d6050fdSStefan Roese #define CONFIG_MTD_PARTITIONS 1505d6050fdSStefan Roese #define CONFIG_RBTREE 1515d6050fdSStefan Roese 1525d6050fdSStefan Roese #if (CONFIG_SYS_NAND_MAX_CHIPS == 1) 1535d6050fdSStefan Roese #define MTDIDS_DEFAULT "nand0=gpmi-nand" 1545d6050fdSStefan Roese #define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:14M(spl),2M(uboot)," \ 1555d6050fdSStefan Roese "512k(env1),512k(env2),-(ubi)" 1565d6050fdSStefan Roese #elif (CONFIG_SYS_NAND_MAX_CHIPS == 2) 1575d6050fdSStefan Roese #define MTDIDS_DEFAULT "nand0=gpmi-nand" 1585d6050fdSStefan Roese #define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:14M(spl),2M(uboot)," \ 1595d6050fdSStefan Roese "512k(env1),512k(env2),495M(ubi0)," \ 1605d6050fdSStefan Roese "14M(res0),2M(res1)," \ 1615d6050fdSStefan Roese "512k(res2),512k(res3),-(ubi1)" 1625d6050fdSStefan Roese #endif 1635d6050fdSStefan Roese 1645d6050fdSStefan Roese /* 1655d6050fdSStefan Roese * Environment configuration 1665d6050fdSStefan Roese */ 1675d6050fdSStefan Roese 1685d6050fdSStefan Roese #if (CONFIG_SYS_NAND_MAX_CHIPS == 1) 1695d6050fdSStefan Roese #define CONFIG_COMMON_ENV_UBI \ 1705d6050fdSStefan Roese "setubipartition=env set ubipartition ubi\0" \ 1715d6050fdSStefan Roese "setubirfs=env set ubirfs $ubipartition:rootfs$boot_vol\0" 1725d6050fdSStefan Roese #elif (CONFIG_SYS_NAND_MAX_CHIPS == 2) 1735d6050fdSStefan Roese #define CONFIG_COMMON_ENV_UBI \ 1745d6050fdSStefan Roese "setubipartition=env set ubipartition ubi$boot_vol\0" \ 1755d6050fdSStefan Roese "setubirfs=env set ubirfs ubi0:rootfs\0" 1765d6050fdSStefan Roese #endif 1775d6050fdSStefan Roese 1785d6050fdSStefan Roese #define CONFIG_COMMON_ENV_MISC \ 1795d6050fdSStefan Roese "user=user\0" \ 1805d6050fdSStefan Roese "project="CONFIG_PLATINUM_PROJECT"\0" \ 1815d6050fdSStefan Roese "uimage=uImage\0" \ 1825d6050fdSStefan Roese "dtb="CONFIG_PLATINUM_CPU"-platinum-"CONFIG_PLATINUM_PROJECT".dtb\0" \ 1835d6050fdSStefan Roese "serverip=serverip\0" \ 1845d6050fdSStefan Roese "memaddrlinux=0x10800000\0" \ 1855d6050fdSStefan Roese "memaddrsrc=0x11000000\0" \ 1865d6050fdSStefan Roese "memaddrdtb=0x12000000\0" \ 1875d6050fdSStefan Roese "console=ttymxc0\0" \ 1885d6050fdSStefan Roese "baudrate=115200\0" \ 1895d6050fdSStefan Roese "boot_scr=boot.uboot\0" \ 1905d6050fdSStefan Roese "boot_vol=0\0" \ 1915d6050fdSStefan Roese "mtdids="MTDIDS_DEFAULT"\0" \ 1925d6050fdSStefan Roese "mtdparts="MTDPARTS_DEFAULT"\0" \ 1935d6050fdSStefan Roese "mmcfs=ext2\0" \ 1945d6050fdSStefan Roese "mmcrootpart=1\0" \ 1955d6050fdSStefan Roese \ 1965d6050fdSStefan Roese "setnfspath=env set nfspath /home/nfs/$user/$project/root\0" \ 1975d6050fdSStefan Roese "settftpfilelinux=env set tftpfilelinux $user/$project/$uimage\0" \ 1985d6050fdSStefan Roese "settftpfiledtb=env set tftpfiledtb $user/$project/$dtb\0" \ 1995d6050fdSStefan Roese "setubifilelinux=env set ubifilelinux boot/$uimage\0" \ 2005d6050fdSStefan Roese "setubipfiledtb=env set ubifiledtb boot/$dtb\0" \ 2015d6050fdSStefan Roese "setmmcrootdev=env set mmcrootdev /dev/mmcblk0p$mmcrootpart\0" \ 2025d6050fdSStefan Roese "setmmcfilelinux=env set mmcfilelinux /boot/$uimage\0" \ 2035d6050fdSStefan Roese "setmmcfiledtb=env set mmcfiledtb /boot/$dtb\0" \ 2045d6050fdSStefan Roese \ 2055d6050fdSStefan Roese "loadtftpkernel=dhcp $memaddrlinux $tftpfilelinux\0" \ 2065d6050fdSStefan Roese "loadtftpdtb=dhcp $memaddrdtb $tftpfiledtb\0" \ 2075d6050fdSStefan Roese "loadubikernel=ubifsload $memaddrlinux $ubifilelinux\0" \ 2085d6050fdSStefan Roese "loadubidtb=ubifsload $memaddrdtb $ubifiledtb\0" \ 2095d6050fdSStefan Roese "loadmmckernel=${mmcfs}load mmc 0:$mmcrootpart $memaddrlinux " \ 2105d6050fdSStefan Roese "$mmcfilelinux\0" \ 2115d6050fdSStefan Roese "loadmmcdtb=${mmcfs}load mmc 0:$mmcrootpart $memaddrdtb " \ 2125d6050fdSStefan Roese "$mmcfiledtb\0" \ 2135d6050fdSStefan Roese \ 2145d6050fdSStefan Roese "ubipart=ubi part $ubipartition\0" \ 2155d6050fdSStefan Roese "ubimount=ubifsmount $ubirfs\0" \ 2165d6050fdSStefan Roese \ 2175d6050fdSStefan Roese "setbootargscommon=env set bootargs $bootargs " \ 2185d6050fdSStefan Roese "console=$console,$baudrate enable_wait_mode=off\0" \ 2195d6050fdSStefan Roese "setbootargsmtd=env set bootargs $bootargs $mtdparts\0" \ 2205d6050fdSStefan Roese "setbootargsdhcp=env set bootargs $bootargs ip=dhcp\0" \ 2215d6050fdSStefan Roese "setbootargsubirfs=env set bootargs $bootargs " \ 2225d6050fdSStefan Roese "ubi.mtd=$ubipartition root=$ubirfs rootfstype=ubifs\0" \ 2235d6050fdSStefan Roese "setbootargsnfsrfs=env set bootargs $bootargs root=/dev/nfs " \ 2245d6050fdSStefan Roese "nfsroot=$serverip:$nfspath,v3,tcp\0" \ 2255d6050fdSStefan Roese "setbootargsmmcrfs=env set bootargs $bootargs " \ 2265d6050fdSStefan Roese "root=$mmcrootdev rootwait rw\0" \ 2275d6050fdSStefan Roese \ 2285d6050fdSStefan Roese "bootnet=run settftpfilelinux settftpfiledtb setnfspath " \ 2295d6050fdSStefan Roese "setbootargscommon setbootargsmtd setbootargsdhcp " \ 2305d6050fdSStefan Roese "setbootargsnfsrfs;" \ 2315d6050fdSStefan Roese "run loadtftpkernel loadtftpdtb;" \ 2325d6050fdSStefan Roese "bootm $memaddrlinux - $memaddrdtb\0" \ 2335d6050fdSStefan Roese "bootnet_ubirfs=run settftpfilelinux settftpfiledtb;" \ 2345d6050fdSStefan Roese "run setubipartition setubirfs;" \ 2355d6050fdSStefan Roese "run setbootargscommon setbootargsmtd " \ 2365d6050fdSStefan Roese "setbootargsubirfs;" \ 2375d6050fdSStefan Roese "run loadtftpkernel loadtftpdtb;" \ 2385d6050fdSStefan Roese "bootm $memaddrlinux - $memaddrdtb\0" \ 2395d6050fdSStefan Roese "bootubi=run setubipartition setubirfs setubifilelinux " \ 2405d6050fdSStefan Roese "setubipfiledtb;" \ 2415d6050fdSStefan Roese "run setbootargscommon setbootargsmtd " \ 2425d6050fdSStefan Roese "setbootargsubirfs;" \ 2435d6050fdSStefan Roese "run ubipart ubimount loadubikernel loadubidtb;" \ 2445d6050fdSStefan Roese "bootm $memaddrlinux - $memaddrdtb\0" \ 2455d6050fdSStefan Roese "bootubi_scr=run setubipartition setubirfs;" \ 2465d6050fdSStefan Roese "run ubipart ubimount;" \ 2475d6050fdSStefan Roese "if ubifsload ${memaddrsrc} boot/${boot_scr}; " \ 2485d6050fdSStefan Roese "then source ${memaddrsrc}; else run bootubi; fi\0" \ 2495d6050fdSStefan Roese "bootmmc=run setmmcrootdev setmmcfilelinux setmmcfiledtb " \ 2505d6050fdSStefan Roese "setbootargscommon setbootargsmmcrfs;" \ 2515d6050fdSStefan Roese "run loadmmckernel loadmmcdtb;" \ 2525d6050fdSStefan Roese "bootm $memaddrlinux - $memaddrdtb\0" \ 2535d6050fdSStefan Roese \ 2545d6050fdSStefan Roese "bootcmd="CONFIG_BOOTCOMMAND"\0" 2555d6050fdSStefan Roese 2565d6050fdSStefan Roese #define CONFIG_COMMON_ENV_SETTINGS CONFIG_COMMON_ENV_MISC \ 2575d6050fdSStefan Roese CONFIG_COMMON_ENV_UBI 2585d6050fdSStefan Roese #endif /* __PLATINUM_CONFIG_H__ */ 259