xref: /rk3399_rockchip-uboot/include/configs/pico-imx6ul.h (revision 3146f0c017df2231d03dff09cee31f7bd63db3e5)
1 /*
2  * Copyright (C) 2015 Technexion Ltd.
3  *
4  * Configuration settings for the Technexion PICO-IMX6UL-EMMC board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 #ifndef __PICO_IMX6UL_CONFIG_H
9 #define __PICO_IMX6UL_CONFIG_H
10 
11 
12 #include <asm/arch/imx-regs.h>
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
15 #include <asm/mach-imx/gpio.h>
16 
17 /* Network support */
18 
19 #define CONFIG_FEC_MXC
20 #define CONFIG_MII
21 #define IMX_FEC_BASE			ENET2_BASE_ADDR
22 #define CONFIG_FEC_MXC_PHYADDR		0x1
23 #define CONFIG_FEC_XCV_TYPE		RMII
24 #define CONFIG_PHY_MICREL
25 
26 /* Size of malloc() pool */
27 #define CONFIG_SYS_MALLOC_LEN		(35 * SZ_1M) /* Increase due to DFU */
28 
29 #define CONFIG_MXC_UART
30 #define CONFIG_MXC_UART_BASE		UART6_BASE_ADDR
31 
32 /* MMC Configs */
33 #define CONFIG_FSL_USDHC
34 #define CONFIG_FSL_ESDHC
35 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC1_BASE_ADDR
36 #define CONFIG_SUPPORT_EMMC_BOOT
37 
38 /* USB Configs */
39 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
40 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
41 #define CONFIG_MXC_USB_FLAGS		0
42 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
43 
44 #define CONFIG_USBD_HS
45 
46 #define CONFIG_USB_FUNCTION_MASS_STORAGE
47 #define CONFIG_USB_GADGET_VBUS_DRAW	2
48 
49 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
50 #define DFU_DEFAULT_POLL_TIMEOUT 300
51 
52 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
53 
54 #define CONFIG_EXTRA_ENV_SETTINGS \
55 	"image=zImage\0" \
56 	"console=ttymxc5\0" \
57 	"fdt_high=0xffffffff\0" \
58 	"initrd_high=0xffffffff\0" \
59 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
60 	"fdt_addr=0x83000000\0" \
61 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
62 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
63 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
64 	"mmcautodetect=yes\0" \
65 	"dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
66 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
67 		"root=${mmcroot}\0" \
68 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
69 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
70 	"mmcboot=echo Booting from mmc ...; " \
71 		"run mmcargs; " \
72 		"if run loadfdt; then " \
73 			"bootz ${loadaddr} - ${fdt_addr}; " \
74 		"else " \
75 			"echo WARN: Cannot load the DT; " \
76 		"fi;\0" \
77 	"netargs=setenv bootargs console=${console},${baudrate} " \
78 		"root=/dev/nfs " \
79 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
80 		"netboot=echo Booting from net ...; " \
81 		"run netargs; " \
82 		"if test ${ip_dyn} = yes; then " \
83 			"setenv get_cmd dhcp; " \
84 		"else " \
85 			"setenv get_cmd tftp; " \
86 		"fi; " \
87 		"${get_cmd} ${image}; " \
88 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
89 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
90 				"bootz ${loadaddr} - ${fdt_addr}; " \
91 			"else " \
92 				"if test ${boot_fdt} = try; then " \
93 					"bootz; " \
94 				"else " \
95 					"echo WARN: Cannot load the DT; " \
96 				"fi; " \
97 			"fi; " \
98 		"else " \
99 			"bootz; " \
100 		"fi;\0" \
101 
102 #define CONFIG_BOOTCOMMAND \
103 	   "if mmc rescan; then " \
104 		   "if run loadimage; then " \
105 			   "run mmcboot; " \
106 		   "else run netboot; " \
107 		   "fi; " \
108 	   "else run netboot; fi"
109 
110 #define CONFIG_SYS_MEMTEST_START	0x80000000
111 #define CONFIG_SYS_MEMTEST_END		CONFIG_SYS_MEMTEST_START + SZ_128M
112 
113 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
114 #define CONFIG_SYS_HZ			1000
115 
116 #define CONFIG_CMDLINE_EDITING
117 
118 /* Physical Memory Map */
119 #define CONFIG_NR_DRAM_BANKS		1
120 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
121 
122 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
123 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
124 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
125 
126 #define CONFIG_SYS_INIT_SP_OFFSET \
127 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
128 #define CONFIG_SYS_INIT_SP_ADDR \
129 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
130 
131 /* I2C configs */
132 #define CONFIG_SYS_I2C
133 #define CONFIG_SYS_I2C_MXC
134 #define CONFIG_SYS_I2C_MXC_I2C1
135 #define CONFIG_SYS_I2C_SPEED		100000
136 
137 /* PMIC */
138 #define CONFIG_POWER
139 #define CONFIG_POWER_I2C
140 #define CONFIG_POWER_PFUZE3000
141 #define CONFIG_POWER_PFUZE3000_I2C_ADDR	0x08
142 
143 /* environment organization */
144 #define CONFIG_ENV_SIZE			SZ_8K
145 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
146 
147 #define CONFIG_SYS_MMC_ENV_DEV		0
148 #define CONFIG_SYS_MMC_ENV_PART		0
149 #define CONFIG_MMCROOT			"/dev/mmcblk0p2"
150 
151 #endif /* __PICO_IMX6UL_CONFIG_H */
152