xref: /rk3399_rockchip-uboot/include/configs/peach-pit.h (revision d7e1f02efc8e5272015afed596c395b5a4f8e196)
18e4ab1d5SAkshay Saraswat /*
28e4ab1d5SAkshay Saraswat  * Copyright (C) 2013 Samsung Electronics
38e4ab1d5SAkshay Saraswat  *
48e4ab1d5SAkshay Saraswat  * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board.
58e4ab1d5SAkshay Saraswat  *
68e4ab1d5SAkshay Saraswat  * SPDX-License-Identifier:	GPL-2.0+
78e4ab1d5SAkshay Saraswat  */
88e4ab1d5SAkshay Saraswat 
98e4ab1d5SAkshay Saraswat #ifndef __CONFIG_PEACH_PIT_H
108e4ab1d5SAkshay Saraswat #define __CONFIG_PEACH_PIT_H
118e4ab1d5SAkshay Saraswat 
12f94de733SSimon Glass #define CONFIG_ENV_IS_IN_SPI_FLASH
13f94de733SSimon Glass #define CONFIG_SPI_FLASH
14f94de733SSimon Glass #define CONFIG_ENV_SPI_BASE	0x12D30000
15f94de733SSimon Glass #define FLASH_SIZE		(0x4 << 20)
16f94de733SSimon Glass #define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
1743900da8SHyungwon Hwang #define CONFIG_SPI_BOOTING
18f94de733SSimon Glass 
19*d7e1f02eSSjoerd Simons #define MEM_LAYOUT_ENV_SETTINGS \
20*d7e1f02eSSjoerd Simons 	"bootm_size=0x10000000\0" \
21*d7e1f02eSSjoerd Simons 	"kernel_addr_r=0x22000000\0" \
22*d7e1f02eSSjoerd Simons 	"fdt_addr_r=0x23000000\0" \
23*d7e1f02eSSjoerd Simons 	"ramdisk_addr_r=0x23300000\0" \
24*d7e1f02eSSjoerd Simons 	"scriptaddr=0x30000000\0" \
25*d7e1f02eSSjoerd Simons 	"pxefile_addr_r=0x31000000\0"
26*d7e1f02eSSjoerd Simons 
2787033d4dSSimon Glass #include <configs/exynos5420-common.h>
287d159536SSimon Glass #include <configs/exynos5-dt-common.h>
298e4ab1d5SAkshay Saraswat 
30f94de733SSimon Glass #define CONFIG_BOARD_COMMON
318e4ab1d5SAkshay Saraswat 
3243900da8SHyungwon Hwang #define CONFIG_SYS_SDRAM_BASE	0x20000000
3343900da8SHyungwon Hwang #define CONFIG_SYS_TEXT_BASE	0x23E00000
3443900da8SHyungwon Hwang #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_IRAM_TOP - 0x800)
3543900da8SHyungwon Hwang 
368e4ab1d5SAkshay Saraswat /* select serial console configuration */
378e4ab1d5SAkshay Saraswat #define CONFIG_SERIAL3		/* use SERIAL 3 */
3843900da8SHyungwon Hwang #define CONFIG_DEFAULT_CONSOLE	"console=ttySAC1,115200n8\0"
398e4ab1d5SAkshay Saraswat 
4079043d84SAkshay Saraswat #define CONFIG_SYS_PROMPT	"Peach-Pit # "
4179043d84SAkshay Saraswat #define CONFIG_IDENT_STRING	" for Peach-Pit"
428e4ab1d5SAkshay Saraswat 
435cecf21fSAjay Kumar #define CONFIG_VIDEO_PARADE
445cecf21fSAjay Kumar 
455cecf21fSAjay Kumar /* Display */
465cecf21fSAjay Kumar #define CONFIG_LCD
475cecf21fSAjay Kumar #ifdef CONFIG_LCD
485cecf21fSAjay Kumar #define CONFIG_EXYNOS_FB
495cecf21fSAjay Kumar #define CONFIG_EXYNOS_DP
505cecf21fSAjay Kumar #define LCD_BPP			LCD_COLOR16
515cecf21fSAjay Kumar #endif
525cecf21fSAjay Kumar 
535b9c8cb6SSimon Glass #define CONFIG_POWER_TPS65090_EC
545b9c8cb6SSimon Glass 
55f94de733SSimon Glass #define CONFIG_USB_XHCI
56f94de733SSimon Glass #define CONFIG_USB_XHCI_EXYNOS
57f94de733SSimon Glass 
5843581c83SAkshay Saraswat /* DRAM Memory Banks */
5943581c83SAkshay Saraswat #define CONFIG_NR_DRAM_BANKS	4
6043581c83SAkshay Saraswat #define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */
6143581c83SAkshay Saraswat 
628e4ab1d5SAkshay Saraswat #endif	/* __CONFIG_PEACH_PIT_H */
63