18e4ab1d5SAkshay Saraswat /* 28e4ab1d5SAkshay Saraswat * Copyright (C) 2013 Samsung Electronics 38e4ab1d5SAkshay Saraswat * 48e4ab1d5SAkshay Saraswat * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board. 58e4ab1d5SAkshay Saraswat * 68e4ab1d5SAkshay Saraswat * SPDX-License-Identifier: GPL-2.0+ 78e4ab1d5SAkshay Saraswat */ 88e4ab1d5SAkshay Saraswat 98e4ab1d5SAkshay Saraswat #ifndef __CONFIG_PEACH_PIT_H 108e4ab1d5SAkshay Saraswat #define __CONFIG_PEACH_PIT_H 118e4ab1d5SAkshay Saraswat 12f94de733SSimon Glass #define CONFIG_ENV_IS_IN_SPI_FLASH 13f94de733SSimon Glass #define CONFIG_SPI_FLASH 14f94de733SSimon Glass #define CONFIG_ENV_SPI_BASE 0x12D30000 15f94de733SSimon Glass #define FLASH_SIZE (0x4 << 20) 16f94de733SSimon Glass #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) 17*43900da8SHyungwon Hwang #define CONFIG_SPI_BOOTING 18f94de733SSimon Glass 1987033d4dSSimon Glass #include <configs/exynos5420-common.h> 207d159536SSimon Glass #include <configs/exynos5-dt-common.h> 218e4ab1d5SAkshay Saraswat 22f94de733SSimon Glass #define CONFIG_BOARD_COMMON 238e4ab1d5SAkshay Saraswat 24*43900da8SHyungwon Hwang #define CONFIG_SYS_SDRAM_BASE 0x20000000 25*43900da8SHyungwon Hwang #define CONFIG_SYS_TEXT_BASE 0x23E00000 26*43900da8SHyungwon Hwang #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) 27*43900da8SHyungwon Hwang 288e4ab1d5SAkshay Saraswat /* select serial console configuration */ 298e4ab1d5SAkshay Saraswat #define CONFIG_SERIAL3 /* use SERIAL 3 */ 30*43900da8SHyungwon Hwang #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" 318e4ab1d5SAkshay Saraswat 3279043d84SAkshay Saraswat #define CONFIG_SYS_PROMPT "Peach-Pit # " 3379043d84SAkshay Saraswat #define CONFIG_IDENT_STRING " for Peach-Pit" 348e4ab1d5SAkshay Saraswat 355cecf21fSAjay Kumar #define CONFIG_VIDEO_PARADE 365cecf21fSAjay Kumar 375cecf21fSAjay Kumar /* Display */ 385cecf21fSAjay Kumar #define CONFIG_LCD 395cecf21fSAjay Kumar #ifdef CONFIG_LCD 405cecf21fSAjay Kumar #define CONFIG_EXYNOS_FB 415cecf21fSAjay Kumar #define CONFIG_EXYNOS_DP 425cecf21fSAjay Kumar #define LCD_BPP LCD_COLOR16 435cecf21fSAjay Kumar #endif 445cecf21fSAjay Kumar 455b9c8cb6SSimon Glass #define CONFIG_POWER_TPS65090_EC 4698149d72SSimon Glass #define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */ 47ea0ebc86SSimon Glass #define CONFIG_DM_CROS_EC 485b9c8cb6SSimon Glass 49f94de733SSimon Glass #define CONFIG_USB_XHCI 50f94de733SSimon Glass #define CONFIG_USB_XHCI_EXYNOS 51f94de733SSimon Glass 5243581c83SAkshay Saraswat /* DRAM Memory Banks */ 5343581c83SAkshay Saraswat #define CONFIG_NR_DRAM_BANKS 4 5443581c83SAkshay Saraswat #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ 5543581c83SAkshay Saraswat 568e4ab1d5SAkshay Saraswat #endif /* __CONFIG_PEACH_PIT_H */ 57