18e4ab1d5SAkshay Saraswat /* 28e4ab1d5SAkshay Saraswat * Copyright (C) 2013 Samsung Electronics 38e4ab1d5SAkshay Saraswat * 48e4ab1d5SAkshay Saraswat * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board. 58e4ab1d5SAkshay Saraswat * 68e4ab1d5SAkshay Saraswat * SPDX-License-Identifier: GPL-2.0+ 78e4ab1d5SAkshay Saraswat */ 88e4ab1d5SAkshay Saraswat 98e4ab1d5SAkshay Saraswat #ifndef __CONFIG_PEACH_PIT_H 108e4ab1d5SAkshay Saraswat #define __CONFIG_PEACH_PIT_H 118e4ab1d5SAkshay Saraswat 12d7e1f02eSSjoerd Simons #define MEM_LAYOUT_ENV_SETTINGS \ 13d7e1f02eSSjoerd Simons "bootm_size=0x10000000\0" \ 14d7e1f02eSSjoerd Simons "kernel_addr_r=0x22000000\0" \ 15d7e1f02eSSjoerd Simons "fdt_addr_r=0x23000000\0" \ 16d7e1f02eSSjoerd Simons "ramdisk_addr_r=0x23300000\0" \ 17d7e1f02eSSjoerd Simons "scriptaddr=0x30000000\0" \ 18d7e1f02eSSjoerd Simons "pxefile_addr_r=0x31000000\0" 19d7e1f02eSSjoerd Simons 2087033d4dSSimon Glass #include <configs/exynos5420-common.h> 217d159536SSimon Glass #include <configs/exynos5-dt-common.h> 22*bf637ea5SSimon Glass #include <configs/exynos5-common.h> 238e4ab1d5SAkshay Saraswat 2443900da8SHyungwon Hwang #define CONFIG_SYS_SDRAM_BASE 0x20000000 2543900da8SHyungwon Hwang #define CONFIG_SYS_TEXT_BASE 0x23E00000 2643900da8SHyungwon Hwang #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) 2743900da8SHyungwon Hwang 288e4ab1d5SAkshay Saraswat /* select serial console configuration */ 298e4ab1d5SAkshay Saraswat #define CONFIG_SERIAL3 /* use SERIAL 3 */ 3043900da8SHyungwon Hwang #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" 318e4ab1d5SAkshay Saraswat 3243581c83SAkshay Saraswat /* DRAM Memory Banks */ 3343581c83SAkshay Saraswat #define CONFIG_NR_DRAM_BANKS 4 3443581c83SAkshay Saraswat #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ 3543581c83SAkshay Saraswat 368e4ab1d5SAkshay Saraswat #endif /* __CONFIG_PEACH_PIT_H */ 37