xref: /rk3399_rockchip-uboot/include/configs/pcm058.h (revision ea7971f705e5b00fad41bc15941b5415fec01ee6)
1 /*
2  * Copyright (C) Stefano Babic <sbabic@denx.de>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 
8 #ifndef __PCM058_CONFIG_H
9 #define __PCM058_CONFIG_H
10 
11 #include <config_distro_defaults.h>
12 
13 #ifdef CONFIG_SPL
14 #define CONFIG_SPL_SPI_LOAD
15 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
16 #include "imx6_spl.h"
17 #endif
18 
19 #include "mx6_common.h"
20 
21 /* Thermal */
22 #define CONFIG_IMX_THERMAL
23 
24 /* Serial */
25 #define CONFIG_MXC_UART
26 #define CONFIG_MXC_UART_BASE	       UART2_BASE
27 #define CONSOLE_DEV		"ttymxc1"
28 
29 #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
30 
31 /* Early setup */
32 #define CONFIG_DISPLAY_BOARDINFO_LATE
33 
34 
35 /* Size of malloc() pool */
36 #define CONFIG_SYS_MALLOC_LEN		(8 * SZ_1M)
37 
38 /* Ethernet */
39 #define CONFIG_FEC_MXC
40 #define CONFIG_MII
41 #define IMX_FEC_BASE			ENET_BASE_ADDR
42 #define CONFIG_FEC_XCV_TYPE		RGMII
43 #define CONFIG_ETHPRIME			"FEC"
44 #define CONFIG_FEC_MXC_PHYADDR		3
45 
46 #define CONFIG_PHYLIB
47 #define CONFIG_PHY_MICREL
48 #define CONFIG_PHY_KSZ9031
49 
50 /* SPI Flash */
51 #define CONFIG_MXC_SPI
52 #define CONFIG_SF_DEFAULT_BUS		0
53 #define CONFIG_SF_DEFAULT_CS		0
54 #define CONFIG_SF_DEFAULT_SPEED		20000000
55 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
56 
57 /* I2C Configs */
58 #define CONFIG_SYS_I2C
59 #define CONFIG_SYS_I2C_MXC
60 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 2 */
61 #define CONFIG_SYS_I2C_SPEED		  100000
62 
63 #ifndef CONFIG_SPL_BUILD
64 #define CONFIG_CMD_NAND
65 /* Enable NAND support */
66 #define CONFIG_CMD_NAND_TRIMFFS
67 #define CONFIG_NAND_MXS
68 #define CONFIG_SYS_MAX_NAND_DEVICE	1
69 #define CONFIG_SYS_NAND_BASE		0x40000000
70 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
71 #define CONFIG_SYS_NAND_ONFI_DETECTION
72 #endif
73 
74 /* DMA stuff, needed for GPMI/MXS NAND support */
75 #define CONFIG_APBH_DMA
76 #define CONFIG_APBH_DMA_BURST
77 #define CONFIG_APBH_DMA_BURST8
78 
79 /* Filesystem support */
80 #define CONFIG_LZO
81 #define CONFIG_CMD_UBIFS
82 #define CONFIG_CMD_MTDPARTS
83 #define CONFIG_MTD_PARTITIONS
84 #define CONFIG_MTD_DEVICE
85 #define MTDIDS_DEFAULT    "nand0=nand"
86 #define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
87 
88 /* Various command support */
89 #define CONFIG_CMD_HDMIDETECT    /* detect HDMI output device */
90 #define CONFIG_CMD_GSC
91 #define CONFIG_RBTREE
92 
93 /* Physical Memory Map */
94 #define CONFIG_NR_DRAM_BANKS           1
95 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
96 
97 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
98 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
99 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
100 
101 #define CONFIG_SYS_INIT_SP_OFFSET \
102 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
103 #define CONFIG_SYS_INIT_SP_ADDR \
104 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
105 
106 /* MMC Configs */
107 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
108 #define CONFIG_SYS_FSL_USDHC_NUM	1
109 
110 /* Environment organization */
111 #define CONFIG_ENV_IS_IN_SPI_FLASH
112 #define CONFIG_ENV_SIZE                (16 * 1024)
113 #define CONFIG_ENV_OFFSET		(1024 * SZ_1K)
114 #define CONFIG_ENV_SECT_SIZE		(64 * SZ_1K)
115 #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
116 #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
117 #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
118 #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
119 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
120 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + \
121 						CONFIG_ENV_SECT_SIZE)
122 #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
123 
124 #ifdef CONFIG_ENV_IS_IN_NAND
125 #define CONFIG_ENV_OFFSET              (0x1E0000)
126 #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
127 #endif
128 
129 #endif
130