xref: /rk3399_rockchip-uboot/include/configs/pcm052.h (revision f40574e2d78c96a3818c4fa2379382d924866a6e)
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the phytec PCM-052 SoM.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include <asm/arch/imx-regs.h>
13 
14 #define CONFIG_VF610
15 
16 #define CONFIG_SKIP_LOWLEVEL_INIT
17 
18 /* Enable passing of ATAGs */
19 #define CONFIG_CMDLINE_TAG
20 
21 /* Size of malloc() pool */
22 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
23 
24 /* Allow to overwrite serial and ethaddr */
25 #define CONFIG_ENV_OVERWRITE
26 
27 /* NAND support */
28 #define CONFIG_CMD_NAND
29 #define CONFIG_CMD_NAND_TRIMFFS
30 #define CONFIG_SYS_NAND_ONFI_DETECTION
31 
32 #ifdef CONFIG_CMD_NAND
33 #define CONFIG_SYS_MAX_NAND_DEVICE	1
34 #define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR
35 
36 #define CONFIG_JFFS2_NAND
37 
38 /* UBI */
39 #define CONFIG_CMD_UBIFS
40 #define CONFIG_RBTREE
41 #define CONFIG_LZO
42 
43 /* Dynamic MTD partition support */
44 #define CONFIG_CMD_MTDPARTS
45 #define CONFIG_MTD_PARTITIONS
46 #define CONFIG_MTD_DEVICE
47 
48 #ifndef MTDIDS_DEFAULT
49 #define MTDIDS_DEFAULT			"nand0=NAND"
50 #endif
51 
52 #ifndef MTDPARTS_DEFAULT
53 #define MTDPARTS_DEFAULT		"mtdparts=NAND:640k(bootloader)"\
54 					",128k(env1)"\
55 					",128k(env2)"\
56 					",128k(dtb)"\
57 					",6144k(kernel)"\
58 					",-(root)"
59 #endif
60 
61 #endif
62 
63 #define CONFIG_FSL_ESDHC
64 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
65 #define CONFIG_SYS_FSL_ESDHC_NUM	1
66 
67 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
68 
69 #define CONFIG_FEC_MXC
70 #define CONFIG_MII
71 #define IMX_FEC_BASE			ENET_BASE_ADDR
72 #define CONFIG_FEC_XCV_TYPE		RMII
73 #define CONFIG_FEC_MXC_PHYADDR          0
74 #define CONFIG_PHYLIB
75 #define CONFIG_PHY_MICREL
76 
77 /* QSPI Configs*/
78 
79 #ifdef CONFIG_FSL_QSPI
80 #define FSL_QSPI_FLASH_SIZE		(1 << 24)
81 #define FSL_QSPI_FLASH_NUM		2
82 #define CONFIG_SYS_FSL_QSPI_LE
83 #endif
84 
85 /* I2C Configs */
86 #define CONFIG_SYS_I2C
87 #define CONFIG_SYS_I2C_MXC_I2C3
88 #define CONFIG_SYS_I2C_MXC
89 
90 /* RTC (actually an RV-4162 but M41T62-compatible) */
91 #define CONFIG_CMD_DATE
92 #define CONFIG_RTC_M41T62
93 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
94 #define CONFIG_SYS_RTC_BUS_NUM 2
95 
96 /* EEPROM (24FC256) */
97 #define CONFIG_CMD_EEPROM
98 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
99 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
100 #define CONFIG_SYS_I2C_EEPROM_BUS 2
101 
102 
103 #define CONFIG_LOADADDR			0x82000000
104 
105 /* We boot from the gfxRAM area of the OCRAM. */
106 #define CONFIG_SYS_TEXT_BASE		0x3f408000
107 #define CONFIG_BOARD_SIZE_LIMIT		524288
108 
109 /* if no target-specific extra environment settings were defined by the
110    target, define an empty one */
111 #ifndef PCM052_EXTRA_ENV_SETTINGS
112 #define PCM052_EXTRA_ENV_SETTINGS
113 #endif
114 
115 /* if no target-specific boot command was defined by the target,
116    define an empty one */
117 #ifndef PCM052_BOOTCOMMAND
118 #define PCM052_BOOTCOMMAND
119 #endif
120 
121 /* if no target-specific extra environment settings were defined by the
122    target, define an empty one */
123 #ifndef PCM052_NET_INIT
124 #define PCM052_NET_INIT
125 #endif
126 
127 /* boot command, including the target-defined one if any */
128 #define CONFIG_BOOTCOMMAND	PCM052_BOOTCOMMAND "run bootcmd_nand"
129 
130 /* Extra env settings (including the target-defined ones if any) */
131 #define CONFIG_EXTRA_ENV_SETTINGS \
132 	PCM052_EXTRA_ENV_SETTINGS \
133 	"autoload=no\0" \
134 	"fdt_high=0xffffffff\0" \
135 	"initrd_high=0xffffffff\0" \
136 	"blimg_file=u-boot.vyb\0" \
137 	"blimg_addr=0x81000000\0" \
138 	"kernel_file=zImage\0" \
139 	"kernel_addr=0x82000000\0" \
140 	"fdt_file=zImage.dtb\0" \
141 	"fdt_addr=0x81000000\0" \
142 	"ram_file=uRamdisk\0" \
143 	"ram_addr=0x83000000\0" \
144 	"filesys=rootfs.ubifs\0" \
145 	"sys_addr=0x81000000\0" \
146 	"tftploc=/path/to/tftp/directory/\0" \
147 	"nfs_root=/path/to/nfs/root\0" \
148 	"tftptimeout=1000\0" \
149 	"tftptimeoutcountmax=1000000\0" \
150 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
151 	"bootargs_base=setenv bootargs rw " \
152 		" mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
153 		"console=ttyLP1,115200n8\0" \
154 	"bootargs_sd=setenv bootargs ${bootargs} " \
155 		"root=/dev/mmcblk0p2 rootwait\0" \
156 	"bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
157 		"nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
158 	"bootargs_nand=setenv bootargs ${bootargs} " \
159 		"ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
160 	"bootargs_ram=setenv bootargs ${bootargs} " \
161 		"root=/dev/ram rw initrd=${ram_addr}\0" \
162 	"bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
163 	"bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
164 		"fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
165 		"fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
166 		"bootz ${kernel_addr} - ${fdt_addr}\0" \
167 	"bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
168 		"tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
169 		"tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
170 		"bootz ${kernel_addr} - ${fdt_addr}\0" \
171 	"bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
172 		"nand read ${fdt_addr} dtb; " \
173 		"nand read ${kernel_addr} kernel; " \
174 		"bootz ${kernel_addr} - ${fdt_addr}\0" \
175 	"bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
176 		"nand read ${fdt_addr} dtb; " \
177 		"nand read ${kernel_addr} kernel; " \
178 		"nand read ${ram_addr} root; " \
179 		"bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
180 	"update_bootloader_from_tftp=" PCM052_NET_INIT \
181 		"if tftp ${blimg_addr} "\
182 		"${tftpdir}${blimg_file}; then " \
183 		"mtdparts default; " \
184 		"nand erase.part bootloader; " \
185 		"nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
186 	"update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
187 		"${kernel_file}; " \
188 		"then mtdparts default; " \
189 		"nand erase.part kernel; " \
190 		"nand write ${kernel_addr} kernel ${filesize}; " \
191 		"if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
192 		"nand erase.part dtb; " \
193 		"nand write ${fdt_addr} dtb ${filesize}; fi\0" \
194 	"update_kernel_from_tftp=" PCM052_NET_INIT \
195 		"if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
196 		"then setenv fdtsize ${filesize}; " \
197 		"if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
198 		"mtdparts default; " \
199 		"nand erase.part dtb; " \
200 		"nand write ${fdt_addr} dtb ${fdtsize}; " \
201 		"nand erase.part kernel; " \
202 		"nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
203 	"update_rootfs_from_tftp=" PCM052_NET_INIT \
204 		"if tftp ${sys_addr} ${tftpdir}${filesys}; " \
205 		"then mtdparts default; " \
206 		"nand erase.part root; " \
207 		"ubi part root; " \
208 		"ubi create rootfs; " \
209 		"ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
210 	"update_ramdisk_from_tftp=" PCM052_NET_INIT \
211 		"if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
212 		"then mtdparts default; " \
213 		"nand erase.part root; " \
214 		"nand write ${ram_addr} root ${filesize}; fi\0"
215 
216 /* Miscellaneous configurable options */
217 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
218 #define CONFIG_AUTO_COMPLETE
219 #define CONFIG_CMDLINE_EDITING
220 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
221 #define CONFIG_SYS_PBSIZE		\
222 			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
223 #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
224 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
225 
226 #define CONFIG_SYS_MEMTEST_START	0x80010000
227 #define CONFIG_SYS_MEMTEST_END		0x87C00000
228 
229 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
230 
231 /*
232  * Stack sizes
233  * The stack sizes are set up in start.S using the settings below
234  */
235 #define CONFIG_STACKSIZE		(128 * 1024)	/* regular stack */
236 
237 /* Physical memory map */
238 #define CONFIG_NR_DRAM_BANKS		1
239 #define PHYS_SDRAM			(0x80000000)
240 #define PHYS_SDRAM_SIZE			(CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
241 
242 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
243 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
244 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
245 
246 #define CONFIG_SYS_INIT_SP_OFFSET \
247 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
248 #define CONFIG_SYS_INIT_SP_ADDR \
249 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
250 
251 /* environment organization */
252 #ifdef CONFIG_ENV_IS_IN_MMC
253 #define CONFIG_ENV_SIZE			(8 * 1024)
254 
255 #define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
256 #define CONFIG_SYS_MMC_ENV_DEV		0
257 #endif
258 
259 #ifdef CONFIG_ENV_IS_IN_NAND
260 #define CONFIG_ENV_SECT_SIZE		(128 * 1024)
261 #define CONFIG_ENV_SIZE			(8 * 1024)
262 #define CONFIG_ENV_OFFSET		0xA0000
263 #define CONFIG_ENV_SIZE_REDUND		(8 * 1024)
264 #define CONFIG_ENV_OFFSET_REDUND	0xC0000
265 #endif
266 
267 #endif
268