1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the phytec PCM-052 SoM. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 14 #define CONFIG_VF610 15 16 #define CONFIG_DISPLAY_CPUINFO 17 #define CONFIG_DISPLAY_BOARDINFO 18 #define CONFIG_SYS_THUMB_BUILD 19 20 #define CONFIG_SKIP_LOWLEVEL_INIT 21 22 /* Enable passing of ATAGs */ 23 #define CONFIG_CMDLINE_TAG 24 25 /* Size of malloc() pool */ 26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 27 28 #define CONFIG_BOARD_EARLY_INIT_F 29 30 /* Allow to overwrite serial and ethaddr */ 31 #define CONFIG_ENV_OVERWRITE 32 #define CONFIG_BAUDRATE 115200 33 34 /* NAND support */ 35 #define CONFIG_CMD_NAND 36 #define CONFIG_CMD_NAND_TRIMFFS 37 #define CONFIG_SYS_NAND_ONFI_DETECTION 38 39 #ifdef CONFIG_CMD_NAND 40 #define CONFIG_USE_ARCH_MEMCPY 41 #define CONFIG_SYS_MAX_NAND_DEVICE 1 42 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR 43 44 #define CONFIG_JFFS2_NAND 45 46 /* UBI */ 47 #define CONFIG_CMD_UBIFS 48 #define CONFIG_RBTREE 49 #define CONFIG_LZO 50 51 /* Dynamic MTD partition support */ 52 #define CONFIG_CMD_MTDPARTS 53 #define CONFIG_MTD_PARTITIONS 54 #define CONFIG_MTD_DEVICE 55 #define MTDIDS_DEFAULT "nand0=NAND" 56 #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\ 57 ",128k(env1)"\ 58 ",128k(env2)"\ 59 ",128k(dtb)"\ 60 ",6144k(kernel)"\ 61 ",-(root)" 62 #endif 63 64 #define CONFIG_MMC 65 #define CONFIG_FSL_ESDHC 66 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 67 #define CONFIG_SYS_FSL_ESDHC_NUM 1 68 69 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ 70 #define CONFIG_SYS_FSL_ERRATUM_ESDHC135 71 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 72 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 73 74 #define CONFIG_GENERIC_MMC 75 #define CONFIG_DOS_PARTITION 76 77 #define CONFIG_FEC_MXC 78 #define CONFIG_MII 79 #define IMX_FEC_BASE ENET_BASE_ADDR 80 #define CONFIG_FEC_XCV_TYPE RMII 81 #define CONFIG_FEC_MXC_PHYADDR 0 82 #define CONFIG_PHYLIB 83 #define CONFIG_PHY_MICREL 84 85 /* QSPI Configs*/ 86 87 #ifdef CONFIG_FSL_QSPI 88 #define CONFIG_SPI_FLASH 89 #define FSL_QSPI_FLASH_SIZE (1 << 24) 90 #define FSL_QSPI_FLASH_NUM 2 91 #define CONFIG_SYS_FSL_QSPI_LE 92 #endif 93 94 /* I2C Configs */ 95 #define CONFIG_SYS_I2C 96 #define CONFIG_SYS_I2C_MXC_I2C3 97 #define CONFIG_SYS_I2C_MXC 98 99 /* RTC (actually an RV-4162 but M41T62-compatible) */ 100 #define CONFIG_CMD_DATE 101 #define CONFIG_RTC_M41T62 102 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 103 #define CONFIG_SYS_RTC_BUS_NUM 2 104 105 /* EEPROM (24FC256) */ 106 #define CONFIG_CMD_EEPROM 107 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 108 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 109 #define CONFIG_SYS_I2C_EEPROM_BUS 2 110 111 112 #define CONFIG_LOADADDR 0x82000000 113 114 /* We boot from the gfxRAM area of the OCRAM. */ 115 #define CONFIG_SYS_TEXT_BASE 0x3f408000 116 #define CONFIG_BOARD_SIZE_LIMIT 524288 117 118 #define CONFIG_BOOTCOMMAND "run bootcmd_sd" 119 #define CONFIG_EXTRA_ENV_SETTINGS \ 120 "fdt_high=0xffffffff\0" \ 121 "initrd_high=0xffffffff\0" \ 122 "blimg_file=u-boot.vyb\0" \ 123 "blimg_addr=0x81000000\0" \ 124 "kernel_file=zImage\0" \ 125 "kernel_addr=0x82000000\0" \ 126 "fdt_file=zImage.dtb\0" \ 127 "fdt_addr=0x81000000\0" \ 128 "ram_file=uRamdisk\0" \ 129 "ram_addr=0x83000000\0" \ 130 "filesys=rootfs.ubifs\0" \ 131 "sys_addr=0x81000000\0" \ 132 "tftploc=/path/to/tftp/directory/\0" \ 133 "nfs_root=/path/to/nfs/root\0" \ 134 "tftptimeout=1000\0" \ 135 "tftptimeoutcountmax=1000000\0" \ 136 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 137 "bootargs_base=setenv bootargs rw " \ 138 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \ 139 "console=ttyLP1,115200n8\0" \ 140 "bootargs_sd=setenv bootargs ${bootargs} " \ 141 "root=/dev/mmcblk0p2 rootwait\0" \ 142 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \ 143 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \ 144 "bootargs_nand=setenv bootargs ${bootargs} " \ 145 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \ 146 "bootargs_ram=setenv bootargs ${bootargs} " \ 147 "root=/dev/ram rw initrd=${ram_addr}\0" \ 148 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 149 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \ 150 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \ 151 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \ 152 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 153 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \ 154 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \ 155 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \ 156 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 157 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \ 158 "nand read ${fdt_addr} dtb; " \ 159 "nand read ${kernel_addr} kernel; " \ 160 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 161 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \ 162 "nand read ${fdt_addr} dtb; " \ 163 "nand read ${kernel_addr} kernel; " \ 164 "nand read ${ram_addr} root; " \ 165 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \ 166 "update_bootloader_from_tftp=if tftp ${blimg_addr} "\ 167 "${tftpdir}${blimg_file}; then " \ 168 "mtdparts default; " \ 169 "nand erase.part bootloader; " \ 170 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \ 171 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \ 172 "${kernel_file}; " \ 173 "then mtdparts default; " \ 174 "nand erase.part kernel; " \ 175 "nand write ${kernel_addr} kernel ${filesize}; " \ 176 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \ 177 "nand erase.part dtb; " \ 178 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \ 179 "update_kernel_from_tftp=if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \ 180 "then setenv fdtsize ${filesize}; " \ 181 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \ 182 "mtdparts default; " \ 183 "nand erase.part dtb; " \ 184 "nand write ${fdt_addr} dtb ${fdtsize}; " \ 185 "nand erase.part kernel; " \ 186 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \ 187 "update_rootfs_from_tftp=if tftp ${sys_addr} ${tftpdir}${filesys}; " \ 188 "then mtdparts default; " \ 189 "nand erase.part root; " \ 190 "ubi part root; " \ 191 "ubi create rootfs; " \ 192 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \ 193 "update_ramdisk_from_tftp=if tftp ${ram_addr} ${tftpdir}${ram_file}; " \ 194 "then mtdparts default; " \ 195 "nand erase.part root; " \ 196 "nand write ${ram_addr} root ${filesize}; fi\0" 197 198 /* Miscellaneous configurable options */ 199 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 200 #define CONFIG_AUTO_COMPLETE 201 #define CONFIG_CMDLINE_EDITING 202 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 203 #define CONFIG_SYS_PBSIZE \ 204 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 205 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 206 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 207 208 #define CONFIG_SYS_MEMTEST_START 0x80010000 209 #define CONFIG_SYS_MEMTEST_END 0x87C00000 210 211 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 212 213 /* 214 * Stack sizes 215 * The stack sizes are set up in start.S using the settings below 216 */ 217 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 218 219 /* Physical memory map */ 220 #define CONFIG_NR_DRAM_BANKS 1 221 #define PHYS_SDRAM (0x80000000) 222 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024) 223 224 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 225 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 226 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 227 228 #define CONFIG_SYS_INIT_SP_OFFSET \ 229 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 230 #define CONFIG_SYS_INIT_SP_ADDR \ 231 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 232 233 /* FLASH and environment organization */ 234 #define CONFIG_SYS_NO_FLASH 235 236 #ifdef CONFIG_ENV_IS_IN_MMC 237 #define CONFIG_ENV_SIZE (8 * 1024) 238 239 #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 240 #define CONFIG_SYS_MMC_ENV_DEV 0 241 #endif 242 243 #ifdef CONFIG_ENV_IS_IN_NAND 244 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 245 #define CONFIG_ENV_SIZE (8 * 1024) 246 #define CONFIG_ENV_OFFSET 0xA0000 247 #define CONFIG_ENV_SIZE_REDUND (8 * 1024) 248 #define CONFIG_ENV_OFFSET_REDUND 0xC0000 249 #endif 250 251 #endif 252