1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the phytec PCM-052 SoM. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #define CONFIG_SYS_CACHELINE_SIZE 32 13 14 #include <asm/arch/imx-regs.h> 15 16 #define CONFIG_VF610 17 18 #define CONFIG_DISPLAY_CPUINFO 19 #define CONFIG_DISPLAY_BOARDINFO 20 #define CONFIG_SYS_THUMB_BUILD 21 22 #define CONFIG_SKIP_LOWLEVEL_INIT 23 24 /* Enable passing of ATAGs */ 25 #define CONFIG_CMDLINE_TAG 26 27 /* Size of malloc() pool */ 28 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 29 30 #define CONFIG_BOARD_EARLY_INIT_F 31 32 /* Allow to overwrite serial and ethaddr */ 33 #define CONFIG_ENV_OVERWRITE 34 #define CONFIG_BAUDRATE 115200 35 36 /* NAND support */ 37 #define CONFIG_CMD_NAND 38 #define CONFIG_CMD_NAND_TRIMFFS 39 #define CONFIG_SYS_NAND_ONFI_DETECTION 40 41 #ifdef CONFIG_CMD_NAND 42 #define CONFIG_USE_ARCH_MEMCPY 43 #define CONFIG_SYS_MAX_NAND_DEVICE 1 44 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR 45 46 #define CONFIG_JFFS2_NAND 47 48 /* UBI */ 49 #define CONFIG_CMD_UBI 50 #define CONFIG_CMD_UBIFS 51 #define CONFIG_RBTREE 52 #define CONFIG_LZO 53 54 /* Dynamic MTD partition support */ 55 #define CONFIG_CMD_MTDPARTS 56 #define CONFIG_MTD_PARTITIONS 57 #define CONFIG_MTD_DEVICE 58 #define MTDIDS_DEFAULT "nand0=NAND" 59 #define MTDPARTS_DEFAULT "mtdparts=NAND:256k(spare)"\ 60 ",384k(bootloader)"\ 61 ",128k(env1)"\ 62 ",128k(env2)"\ 63 ",128k(dtb)"\ 64 ",6144k(kernel)"\ 65 ",65536k(ramdisk)"\ 66 ",450944k(root)" 67 #endif 68 69 #define CONFIG_MMC 70 #define CONFIG_FSL_ESDHC 71 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 72 #define CONFIG_SYS_FSL_ESDHC_NUM 1 73 74 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ 75 #define CONFIG_SYS_FSL_ERRATUM_ESDHC135 76 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 77 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 78 79 #define CONFIG_CMD_MMC 80 #define CONFIG_GENERIC_MMC 81 #define CONFIG_CMD_FAT 82 #define CONFIG_DOS_PARTITION 83 84 #define CONFIG_CMD_MII 85 #define CONFIG_FEC_MXC 86 #define CONFIG_MII 87 #define IMX_FEC_BASE ENET_BASE_ADDR 88 #define CONFIG_FEC_XCV_TYPE RMII 89 #define CONFIG_FEC_MXC_PHYADDR 0 90 #define CONFIG_PHYLIB 91 #define CONFIG_PHY_MICREL 92 93 /* QSPI Configs*/ 94 95 #ifdef CONFIG_FSL_QSPI 96 #define CONFIG_SPI_FLASH 97 #define FSL_QSPI_FLASH_SIZE (1 << 24) 98 #define FSL_QSPI_FLASH_NUM 2 99 #define CONFIG_SYS_FSL_QSPI_LE 100 #endif 101 102 /* I2C Configs */ 103 #define CONFIG_SYS_I2C 104 #define CONFIG_SYS_I2C_MXC_I2C3 105 #define CONFIG_SYS_I2C_MXC 106 107 /* RTC (actually an RV-4162 but M41T62-compatible) */ 108 #define CONFIG_CMD_DATE 109 #define CONFIG_RTC_M41T62 110 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 111 #define CONFIG_SYS_RTC_BUS_NUM 2 112 113 /* EEPROM (24FC256) */ 114 #define CONFIG_CMD_EEPROM 115 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 116 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 117 #define CONFIG_SYS_I2C_EEPROM_BUS 2 118 119 #define CONFIG_BOOTDELAY 3 120 121 #define CONFIG_LOADADDR 0x82000000 122 123 /* We boot from the gfxRAM area of the OCRAM. */ 124 #define CONFIG_SYS_TEXT_BASE 0x3f408000 125 #define CONFIG_BOARD_SIZE_LIMIT 524288 126 127 #define CONFIG_BOOTCOMMAND "run bootcmd_sd" 128 #define CONFIG_EXTRA_ENV_SETTINGS \ 129 "fdt_high=0xffffffff\0" \ 130 "initrd_high=0xffffffff\0" \ 131 "blimg_file=u-boot.imx\0" \ 132 "blsec_addr=0x81000000\0" \ 133 "blimg_addr=0x81000400\0" \ 134 "kernel_file=zImage\0" \ 135 "kernel_addr=0x82000000\0" \ 136 "fdt_file=vf610-pcm052.dtb\0" \ 137 "fdt_addr=0x81000000\0" \ 138 "ram_file=uRamdisk\0" \ 139 "ram_addr=0x83000000\0" \ 140 "filesys=rootfs.ubifs\0" \ 141 "sys_addr=0x81000000\0" \ 142 "tftploc=/path/to/tftp/directory/\0" \ 143 "nfs_root=/path/to/nfs/root\0" \ 144 "tftptimeout=1000\0" \ 145 "tftptimeoutcountmax=1000000\0" \ 146 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 147 "bootargs_base=setenv bootargs rw mem=256M " \ 148 "console=ttyLP1,115200n8\0" \ 149 "bootargs_sd=setenv bootargs ${bootargs} " \ 150 "root=/dev/mmcblk0p2 rootwait\0" \ 151 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \ 152 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \ 153 "bootargs_nand=setenv bootargs ${bootargs} " \ 154 "ubi.mtd=6 rootfstype=ubifs root=ubi0:rootfs\0" \ 155 "bootargs_ram=setenv bootargs ${bootargs} " \ 156 "root=/dev/ram rw initrd=${ram_addr}\0" \ 157 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 158 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \ 159 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \ 160 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \ 161 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 162 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \ 163 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \ 164 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \ 165 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 166 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \ 167 "nand read ${fdt_addr} dtb; " \ 168 "nand read ${kernel_addr} kernel; " \ 169 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 170 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \ 171 "nand read ${fdt_addr} dtb; " \ 172 "nand read ${kernel_addr} kernel; " \ 173 "nand read ${ram_addr} ramdisk; " \ 174 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \ 175 "update_bootloader_from_tftp=mtdparts default; " \ 176 "nand read ${blsec_addr} bootloader; " \ 177 "mw.b ${blimg_addr} 0xff 0x5FC00; " \ 178 "if tftp ${blimg_addr} ${tftpdir}${blimg_file}; then " \ 179 "nand erase.part bootloader; " \ 180 "nand write ${blsec_addr} bootloader ${filesize}; fi\0" \ 181 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \ 182 "${kernel_file}; " \ 183 "then mtdparts default; " \ 184 "nand erase.part kernel; " \ 185 "nand write ${kernel_addr} kernel ${filesize}; " \ 186 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \ 187 "nand erase.part dtb; " \ 188 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \ 189 "update_kernel_from_tftp=if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \ 190 "then setenv fdtsize ${filesize}; " \ 191 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \ 192 "mtdparts default; " \ 193 "nand erase.part dtb; " \ 194 "nand write ${fdt_addr} dtb ${fdtsize}; " \ 195 "nand erase.part kernel; " \ 196 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \ 197 "update_rootfs_from_tftp=if tftp ${sys_addr} ${tftpdir}${filesys}; " \ 198 "then mtdparts default; " \ 199 "nand erase.part root; " \ 200 "ubi part root; " \ 201 "ubi create rootfs; " \ 202 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \ 203 "update_ramdisk_from_tftp=if tftp ${ram_addr} ${tftpdir}${ram_file}; " \ 204 "then mtdparts default; " \ 205 "nand erase.part ramdisk; " \ 206 "nand write ${ram_addr} ramdisk ${filesize}; fi\0" 207 208 /* Miscellaneous configurable options */ 209 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 210 #define CONFIG_AUTO_COMPLETE 211 #define CONFIG_CMDLINE_EDITING 212 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 213 #define CONFIG_SYS_PBSIZE \ 214 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 215 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 216 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 217 218 #define CONFIG_SYS_MEMTEST_START 0x80010000 219 #define CONFIG_SYS_MEMTEST_END 0x87C00000 220 221 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 222 223 /* 224 * Stack sizes 225 * The stack sizes are set up in start.S using the settings below 226 */ 227 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 228 229 /* Physical memory map */ 230 #define CONFIG_NR_DRAM_BANKS 1 231 #define PHYS_SDRAM (0x80000000) 232 #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) 233 234 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 235 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 236 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 237 238 #define CONFIG_SYS_INIT_SP_OFFSET \ 239 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 240 #define CONFIG_SYS_INIT_SP_ADDR \ 241 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 242 243 /* FLASH and environment organization */ 244 #define CONFIG_SYS_NO_FLASH 245 246 #ifdef CONFIG_ENV_IS_IN_MMC 247 #define CONFIG_ENV_SIZE (8 * 1024) 248 249 #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 250 #define CONFIG_SYS_MMC_ENV_DEV 0 251 #endif 252 253 #ifdef CONFIG_ENV_IS_IN_NAND 254 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 255 #define CONFIG_ENV_SIZE (8 * 1024) 256 #define CONFIG_ENV_OFFSET 0xA0000 257 #define CONFIG_ENV_SIZE_REDUND (8 * 1024) 258 #define CONFIG_ENV_OFFSET_REDUND 0xC0000 259 #endif 260 261 #define CONFIG_CMD_BOOTZ 262 263 #endif 264