1 /* 2 * pcm051.h 3 * 4 * Phytec phyCORE-AM335x (pcm051) boards information header 5 * 6 * Copyright (C) 2013 Lemonage Software GmbH 7 * Author Lars Poeschel <poeschel@lemonage.de> 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation version 2. 12 * 13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 14 * kind, whether express or implied; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19 #ifndef __CONFIG_PCM051_H 20 #define __CONFIG_PCM051_H 21 22 #define CONFIG_AM33XX 23 24 #include <asm/arch/omap.h> 25 26 #define CONFIG_DMA_COHERENT 27 #define CONFIG_DMA_COHERENT_SIZE (1 << 20) 28 29 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 30 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 31 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 32 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 33 #define CONFIG_SYS_PROMPT "U-Boot# " 34 #define CONFIG_SYS_NO_FLASH 35 #define MACH_TYPE_PCM051 4144 /* Until the next sync */ 36 #define CONFIG_MACH_TYPE MACH_TYPE_PCM051 37 38 #define CONFIG_OF_LIBFDT 39 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 40 #define CONFIG_SETUP_MEMORY_TAGS 41 #define CONFIG_INITRD_TAG 42 43 /* commands to include */ 44 #include <config_cmd_default.h> 45 46 #define CONFIG_CMD_ASKENV 47 #define CONFIG_VERSION_VARIABLE 48 49 /* set to negative value for no autoboot */ 50 #define CONFIG_BOOTDELAY 1 51 #define CONFIG_ENV_VARS_UBOOT_CONFIG 52 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 53 #define CONFIG_EXTRA_ENV_SETTINGS \ 54 "loadaddr=0x80007fc0\0" \ 55 "fdtaddr=0x80000000\0" \ 56 "rdaddr=0x81000000\0" \ 57 "bootfile=uImage\0" \ 58 "fdtfile=pcm051.dtb\0" \ 59 "console=ttyO0,115200n8\0" \ 60 "optargs=\0" \ 61 "mmcdev=0\0" \ 62 "mmcroot=/dev/mmcblk0p2 ro\0" \ 63 "mmcrootfstype=ext4 rootwait\0" \ 64 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ 65 "ramrootfstype=ext2\0" \ 66 "mmcargs=setenv bootargs console=${console} " \ 67 "${optargs} " \ 68 "root=${mmcroot} " \ 69 "rootfstype=${mmcrootfstype}\0" \ 70 "bootenv=uEnv.txt\0" \ 71 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 72 "importbootenv=echo Importing environment from mmc ...; " \ 73 "env import -t $loadaddr $filesize\0" \ 74 "ramargs=setenv bootargs console=${console} " \ 75 "${optargs} " \ 76 "root=${ramroot} " \ 77 "rootfstype=${ramrootfstype}\0" \ 78 "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 79 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ 80 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \ 81 "mmcboot=echo Booting from mmc ...; " \ 82 "run mmcargs; " \ 83 "bootm ${loadaddr}\0" \ 84 "ramboot=echo Booting from ramdisk ...; " \ 85 "run ramargs; " \ 86 "bootm ${loadaddr}\0" \ 87 88 #define CONFIG_BOOTCOMMAND \ 89 "mmc dev ${mmcdev}; if mmc rescan; then " \ 90 "echo SD/MMC found on device ${mmcdev};" \ 91 "if run loadbootenv; then " \ 92 "echo Loaded environment from ${bootenv};" \ 93 "run importbootenv;" \ 94 "fi;" \ 95 "if test -n $uenvcmd; then " \ 96 "echo Running uenvcmd ...;" \ 97 "run uenvcmd;" \ 98 "fi;" \ 99 "if run loaduimage; then " \ 100 "run mmcboot;" \ 101 "fi;" \ 102 "fi;" \ 103 104 /* Clock Defines */ 105 #define V_OSCK 25000000 /* Clock output from T2 */ 106 #define V_SCLK (V_OSCK) 107 108 #define CONFIG_CMD_ECHO 109 110 /* max number of command args */ 111 #define CONFIG_SYS_MAXARGS 16 112 113 /* Console I/O Buffer Size */ 114 #define CONFIG_SYS_CBSIZE 512 115 116 /* Print Buffer Size */ 117 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 118 + sizeof(CONFIG_SYS_PROMPT) + 16) 119 120 /* Boot Argument Buffer Size */ 121 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 122 123 /* 124 * memtest works on 8 MB in DRAM after skipping 32MB from 125 * start addr of ram disk 126 */ 127 #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) 128 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ 129 + (8 * 1024 * 1024)) 130 131 #define CONFIG_SYS_LOAD_ADDR 0x80007fc0 /* Default load address */ 132 133 #define CONFIG_MMC 134 #define CONFIG_GENERIC_MMC 135 #define CONFIG_OMAP_HSMMC 136 #define CONFIG_CMD_MMC 137 #define CONFIG_DOS_PARTITION 138 #define CONFIG_CMD_FAT 139 #define CONFIG_CMD_EXT2 140 141 #define CONFIG_SPI 142 #define CONFIG_OMAP3_SPI 143 #define CONFIG_MTD_DEVICE 144 #define CONFIG_SPI_FLASH 145 #define CONFIG_SPI_FLASH_WINBOND 146 #define CONFIG_CMD_SF 147 #define CONFIG_SF_DEFAULT_SPEED 24000000 148 149 /* Physical Memory Map */ 150 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 151 #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ 152 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 19) /* 512MiB */ 153 154 #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 155 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 156 GENERATED_GBL_DATA_SIZE) 157 /* Platform/Board specific defs */ 158 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 159 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 160 #define CONFIG_SYS_HZ 1000 /* 1ms clock */ 161 162 #define CONFIG_CONS_INDEX 1 163 /* NS16550 Configuration */ 164 #define CONFIG_SYS_NS16550 165 #define CONFIG_SYS_NS16550_SERIAL 166 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 167 #define CONFIG_SYS_NS16550_CLK (48000000) 168 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ 169 #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 170 #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ 171 #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ 172 #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ 173 #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ 174 175 /* I2C Configuration */ 176 #define CONFIG_I2C 177 #define CONFIG_CMD_I2C 178 #define CONFIG_HARD_I2C 179 #define CONFIG_SYS_I2C_SPEED 100000 180 #define CONFIG_SYS_I2C_SLAVE 1 181 #define CONFIG_I2C_MULTI_BUS 182 #define CONFIG_DRIVER_OMAP24XX_I2C 183 #define CONFIG_CMD_EEPROM 184 #define CONFIG_ENV_EEPROM_IS_ON_I2C 185 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 186 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 187 #define CONFIG_SYS_I2C_MULTI_EEPROMS 188 189 #define CONFIG_OMAP_GPIO 190 191 #define CONFIG_BAUDRATE 115200 192 #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ 193 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } 194 195 #define CONFIG_ENV_OVERWRITE 196 #define CONFIG_SYS_CONSOLE_INFO_QUIET 197 198 #define CONFIG_ENV_IS_NOWHERE 199 200 /* Defines for SPL */ 201 #define CONFIG_SPL 202 #define CONFIG_SPL_FRAMEWORK 203 #define CONFIG_SPL_TEXT_BASE 0x402F0400 204 #define CONFIG_SPL_MAX_SIZE (101 * 1024) 205 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 206 207 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 208 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 209 210 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 211 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 212 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 213 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 214 #define CONFIG_SPL_MMC_SUPPORT 215 #define CONFIG_SPL_FAT_SUPPORT 216 #define CONFIG_SPL_I2C_SUPPORT 217 218 #define CONFIG_SPL_LIBCOMMON_SUPPORT 219 #define CONFIG_SPL_LIBDISK_SUPPORT 220 #define CONFIG_SPL_LIBGENERIC_SUPPORT 221 #define CONFIG_SPL_SERIAL_SUPPORT 222 #define CONFIG_SPL_GPIO_SUPPORT 223 #define CONFIG_SPL_YMODEM_SUPPORT 224 #define CONFIG_SPL_NET_SUPPORT 225 #define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL" 226 #define CONFIG_SPL_ETH_SUPPORT 227 #define CONFIG_SPL_SPI_SUPPORT 228 #define CONFIG_SPL_SPI_FLASH_SUPPORT 229 #define CONFIG_SPL_SPI_LOAD 230 #define CONFIG_SPL_SPI_BUS 0 231 #define CONFIG_SPL_SPI_CS 0 232 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 233 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 234 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" 235 236 /* 237 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 238 * 64 bytes before this address should be set aside for u-boot.img's 239 * header. That is 0x800FFFC0--0x80100000 should not be used for any 240 * other needs. 241 */ 242 #define CONFIG_SYS_TEXT_BASE 0x80800000 243 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 244 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 245 246 /* Since SPL did pll and ddr initialization for us, 247 * we don't need to do it twice. 248 */ 249 #ifndef CONFIG_SPL_BUILD 250 #define CONFIG_SKIP_LOWLEVEL_INIT 251 #endif 252 253 /* 254 * USB configuration 255 */ 256 #define CONFIG_USB_MUSB_DSPS 257 #define CONFIG_ARCH_MISC_INIT 258 #define CONFIG_MUSB_GADGET 259 #define CONFIG_MUSB_PIO_ONLY 260 #define CONFIG_USB_GADGET_DUALSPEED 261 #define CONFIG_MUSB_HOST 262 #define CONFIG_AM335X_USB0 263 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL 264 #define CONFIG_AM335X_USB1 265 #define CONFIG_AM335X_USB1_MODE MUSB_HOST 266 267 #ifdef CONFIG_MUSB_HOST 268 #define CONFIG_CMD_USB 269 #define CONFIG_USB_STORAGE 270 #endif 271 272 #ifdef CONFIG_MUSB_GADGET 273 #define CONFIG_USB_ETHER 274 #define CONFIG_USB_ETH_RNDIS 275 #endif /* CONFIG_MUSB_GADGET */ 276 277 /* Unsupported features */ 278 #undef CONFIG_USE_IRQ 279 280 #define CONFIG_CMD_NET 281 #define CONFIG_CMD_DHCP 282 #define CONFIG_CMD_PING 283 #define CONFIG_DRIVER_TI_CPSW 284 #define CONFIG_MII 285 #define CONFIG_BOOTP_DEFAULT 286 #define CONFIG_BOOTP_DNS 287 #define CONFIG_BOOTP_DNS2 288 #define CONFIG_BOOTP_SEND_HOSTNAME 289 #define CONFIG_BOOTP_GATEWAY 290 #define CONFIG_BOOTP_SUBNETMASK 291 #define CONFIG_NET_RETRY_COUNT 10 292 #define CONFIG_NET_MULTI 293 #define CONFIG_PHY_GIGE 294 #define CONFIG_PHYLIB 295 #define CONFIG_PHY_ADDR 0 296 #define CONFIG_PHY_SMSC 297 298 #endif /* ! __CONFIG_PCM051_H */ 299