1*1c1b7c37SLars Poeschel /* 2*1c1b7c37SLars Poeschel * pcm051.h 3*1c1b7c37SLars Poeschel * 4*1c1b7c37SLars Poeschel * Phytec phyCORE-AM335x (pcm051) boards information header 5*1c1b7c37SLars Poeschel * 6*1c1b7c37SLars Poeschel * Copyright (C) 2013 Lemonage Software GmbH 7*1c1b7c37SLars Poeschel * Author Lars Poeschel <poeschel@lemonage.de> 8*1c1b7c37SLars Poeschel * 9*1c1b7c37SLars Poeschel * This program is free software; you can redistribute it and/or 10*1c1b7c37SLars Poeschel * modify it under the terms of the GNU General Public License as 11*1c1b7c37SLars Poeschel * published by the Free Software Foundation version 2. 12*1c1b7c37SLars Poeschel * 13*1c1b7c37SLars Poeschel * This program is distributed "as is" WITHOUT ANY WARRANTY of any 14*1c1b7c37SLars Poeschel * kind, whether express or implied; without even the implied warranty 15*1c1b7c37SLars Poeschel * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*1c1b7c37SLars Poeschel * GNU General Public License for more details. 17*1c1b7c37SLars Poeschel */ 18*1c1b7c37SLars Poeschel 19*1c1b7c37SLars Poeschel #ifndef __CONFIG_PCM051_H 20*1c1b7c37SLars Poeschel #define __CONFIG_PCM051_H 21*1c1b7c37SLars Poeschel 22*1c1b7c37SLars Poeschel #define CONFIG_AM33XX 23*1c1b7c37SLars Poeschel 24*1c1b7c37SLars Poeschel #include <asm/arch/cpu.h> 25*1c1b7c37SLars Poeschel #include <asm/arch/hardware.h> 26*1c1b7c37SLars Poeschel 27*1c1b7c37SLars Poeschel #define CONFIG_DMA_COHERENT 28*1c1b7c37SLars Poeschel #define CONFIG_DMA_COHERENT_SIZE (1 << 20) 29*1c1b7c37SLars Poeschel 30*1c1b7c37SLars Poeschel #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 31*1c1b7c37SLars Poeschel #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 32*1c1b7c37SLars Poeschel #define CONFIG_SYS_LONGHELP /* undef to save memory */ 33*1c1b7c37SLars Poeschel #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 34*1c1b7c37SLars Poeschel #define CONFIG_SYS_PROMPT "U-Boot# " 35*1c1b7c37SLars Poeschel #define CONFIG_SYS_NO_FLASH 36*1c1b7c37SLars Poeschel #define MACH_TYPE_PCM051 4144 /* Until the next sync */ 37*1c1b7c37SLars Poeschel #define CONFIG_MACH_TYPE MACH_TYPE_PCM051 38*1c1b7c37SLars Poeschel 39*1c1b7c37SLars Poeschel #define CONFIG_OF_LIBFDT 40*1c1b7c37SLars Poeschel #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 41*1c1b7c37SLars Poeschel #define CONFIG_SETUP_MEMORY_TAGS 42*1c1b7c37SLars Poeschel #define CONFIG_INITRD_TAG 43*1c1b7c37SLars Poeschel 44*1c1b7c37SLars Poeschel /* commands to include */ 45*1c1b7c37SLars Poeschel #include <config_cmd_default.h> 46*1c1b7c37SLars Poeschel 47*1c1b7c37SLars Poeschel #define CONFIG_CMD_ASKENV 48*1c1b7c37SLars Poeschel #define CONFIG_VERSION_VARIABLE 49*1c1b7c37SLars Poeschel 50*1c1b7c37SLars Poeschel /* set to negative value for no autoboot */ 51*1c1b7c37SLars Poeschel #define CONFIG_BOOTDELAY 1 52*1c1b7c37SLars Poeschel #define CONFIG_ENV_VARS_UBOOT_CONFIG 53*1c1b7c37SLars Poeschel #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 54*1c1b7c37SLars Poeschel #define CONFIG_EXTRA_ENV_SETTINGS \ 55*1c1b7c37SLars Poeschel "loadaddr=0x80007fc0\0" \ 56*1c1b7c37SLars Poeschel "fdtaddr=0x80000000\0" \ 57*1c1b7c37SLars Poeschel "rdaddr=0x81000000\0" \ 58*1c1b7c37SLars Poeschel "bootfile=uImage\0" \ 59*1c1b7c37SLars Poeschel "fdtfile=pcm051.dtb\0" \ 60*1c1b7c37SLars Poeschel "console=ttyO0,115200n8\0" \ 61*1c1b7c37SLars Poeschel "optargs=\0" \ 62*1c1b7c37SLars Poeschel "mmcdev=0\0" \ 63*1c1b7c37SLars Poeschel "mmcroot=/dev/mmcblk0p2 ro\0" \ 64*1c1b7c37SLars Poeschel "mmcrootfstype=ext4 rootwait\0" \ 65*1c1b7c37SLars Poeschel "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ 66*1c1b7c37SLars Poeschel "ramrootfstype=ext2\0" \ 67*1c1b7c37SLars Poeschel "mmcargs=setenv bootargs console=${console} " \ 68*1c1b7c37SLars Poeschel "${optargs} " \ 69*1c1b7c37SLars Poeschel "root=${mmcroot} " \ 70*1c1b7c37SLars Poeschel "rootfstype=${mmcrootfstype}\0" \ 71*1c1b7c37SLars Poeschel "bootenv=uEnv.txt\0" \ 72*1c1b7c37SLars Poeschel "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 73*1c1b7c37SLars Poeschel "importbootenv=echo Importing environment from mmc ...; " \ 74*1c1b7c37SLars Poeschel "env import -t $loadaddr $filesize\0" \ 75*1c1b7c37SLars Poeschel "ramargs=setenv bootargs console=${console} " \ 76*1c1b7c37SLars Poeschel "${optargs} " \ 77*1c1b7c37SLars Poeschel "root=${ramroot} " \ 78*1c1b7c37SLars Poeschel "rootfstype=${ramrootfstype}\0" \ 79*1c1b7c37SLars Poeschel "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 80*1c1b7c37SLars Poeschel "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ 81*1c1b7c37SLars Poeschel "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \ 82*1c1b7c37SLars Poeschel "mmcboot=echo Booting from mmc ...; " \ 83*1c1b7c37SLars Poeschel "run mmcargs; " \ 84*1c1b7c37SLars Poeschel "bootm ${loadaddr}\0" \ 85*1c1b7c37SLars Poeschel "ramboot=echo Booting from ramdisk ...; " \ 86*1c1b7c37SLars Poeschel "run ramargs; " \ 87*1c1b7c37SLars Poeschel "bootm ${loadaddr}\0" \ 88*1c1b7c37SLars Poeschel 89*1c1b7c37SLars Poeschel #define CONFIG_BOOTCOMMAND \ 90*1c1b7c37SLars Poeschel "mmc dev ${mmcdev}; if mmc rescan; then " \ 91*1c1b7c37SLars Poeschel "echo SD/MMC found on device ${mmcdev};" \ 92*1c1b7c37SLars Poeschel "if run loadbootenv; then " \ 93*1c1b7c37SLars Poeschel "echo Loaded environment from ${bootenv};" \ 94*1c1b7c37SLars Poeschel "run importbootenv;" \ 95*1c1b7c37SLars Poeschel "fi;" \ 96*1c1b7c37SLars Poeschel "if test -n $uenvcmd; then " \ 97*1c1b7c37SLars Poeschel "echo Running uenvcmd ...;" \ 98*1c1b7c37SLars Poeschel "run uenvcmd;" \ 99*1c1b7c37SLars Poeschel "fi;" \ 100*1c1b7c37SLars Poeschel "if run loaduimage; then " \ 101*1c1b7c37SLars Poeschel "run mmcboot;" \ 102*1c1b7c37SLars Poeschel "fi;" \ 103*1c1b7c37SLars Poeschel "fi;" \ 104*1c1b7c37SLars Poeschel 105*1c1b7c37SLars Poeschel /* Clock Defines */ 106*1c1b7c37SLars Poeschel #define V_OSCK 25000000 /* Clock output from T2 */ 107*1c1b7c37SLars Poeschel #define V_SCLK (V_OSCK) 108*1c1b7c37SLars Poeschel 109*1c1b7c37SLars Poeschel #define CONFIG_CMD_ECHO 110*1c1b7c37SLars Poeschel 111*1c1b7c37SLars Poeschel /* max number of command args */ 112*1c1b7c37SLars Poeschel #define CONFIG_SYS_MAXARGS 16 113*1c1b7c37SLars Poeschel 114*1c1b7c37SLars Poeschel /* Console I/O Buffer Size */ 115*1c1b7c37SLars Poeschel #define CONFIG_SYS_CBSIZE 512 116*1c1b7c37SLars Poeschel 117*1c1b7c37SLars Poeschel /* Print Buffer Size */ 118*1c1b7c37SLars Poeschel #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 119*1c1b7c37SLars Poeschel + sizeof(CONFIG_SYS_PROMPT) + 16) 120*1c1b7c37SLars Poeschel 121*1c1b7c37SLars Poeschel /* Boot Argument Buffer Size */ 122*1c1b7c37SLars Poeschel #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 123*1c1b7c37SLars Poeschel 124*1c1b7c37SLars Poeschel /* 125*1c1b7c37SLars Poeschel * memtest works on 8 MB in DRAM after skipping 32MB from 126*1c1b7c37SLars Poeschel * start addr of ram disk 127*1c1b7c37SLars Poeschel */ 128*1c1b7c37SLars Poeschel #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) 129*1c1b7c37SLars Poeschel #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ 130*1c1b7c37SLars Poeschel + (8 * 1024 * 1024)) 131*1c1b7c37SLars Poeschel 132*1c1b7c37SLars Poeschel #define CONFIG_SYS_LOAD_ADDR 0x80007fc0 /* Default load address */ 133*1c1b7c37SLars Poeschel #define CONFIG_SYS_HZ 1000 /* 1ms clock */ 134*1c1b7c37SLars Poeschel 135*1c1b7c37SLars Poeschel #define CONFIG_MMC 136*1c1b7c37SLars Poeschel #define CONFIG_GENERIC_MMC 137*1c1b7c37SLars Poeschel #define CONFIG_OMAP_HSMMC 138*1c1b7c37SLars Poeschel #define CONFIG_CMD_MMC 139*1c1b7c37SLars Poeschel #define CONFIG_DOS_PARTITION 140*1c1b7c37SLars Poeschel #define CONFIG_CMD_FAT 141*1c1b7c37SLars Poeschel #define CONFIG_CMD_EXT2 142*1c1b7c37SLars Poeschel 143*1c1b7c37SLars Poeschel #define CONFIG_SPI 144*1c1b7c37SLars Poeschel #define CONFIG_OMAP3_SPI 145*1c1b7c37SLars Poeschel #define CONFIG_MTD_DEVICE 146*1c1b7c37SLars Poeschel #define CONFIG_SPI_FLASH 147*1c1b7c37SLars Poeschel #define CONFIG_SPI_FLASH_WINBOND 148*1c1b7c37SLars Poeschel #define CONFIG_CMD_SF 149*1c1b7c37SLars Poeschel #define CONFIG_SF_DEFAULT_SPEED 24000000 150*1c1b7c37SLars Poeschel 151*1c1b7c37SLars Poeschel /* Physical Memory Map */ 152*1c1b7c37SLars Poeschel #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 153*1c1b7c37SLars Poeschel #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ 154*1c1b7c37SLars Poeschel #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 19) /* 512MiB */ 155*1c1b7c37SLars Poeschel 156*1c1b7c37SLars Poeschel #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 157*1c1b7c37SLars Poeschel #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 158*1c1b7c37SLars Poeschel GENERATED_GBL_DATA_SIZE) 159*1c1b7c37SLars Poeschel /* Platform/Board specific defs */ 160*1c1b7c37SLars Poeschel #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 161*1c1b7c37SLars Poeschel #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 162*1c1b7c37SLars Poeschel #define CONFIG_SYS_HZ 1000 163*1c1b7c37SLars Poeschel 164*1c1b7c37SLars Poeschel #define CONFIG_CONS_INDEX 1 165*1c1b7c37SLars Poeschel /* NS16550 Configuration */ 166*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550 167*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550_SERIAL 168*1c1b7c37SLars Poeschel #define CONFIG_SERIAL_MULTI 169*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550_REG_SIZE (-4) 170*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550_CLK (48000000) 171*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ 172*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 173*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ 174*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ 175*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ 176*1c1b7c37SLars Poeschel #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ 177*1c1b7c37SLars Poeschel 178*1c1b7c37SLars Poeschel /* I2C Configuration */ 179*1c1b7c37SLars Poeschel #define CONFIG_I2C 180*1c1b7c37SLars Poeschel #define CONFIG_CMD_I2C 181*1c1b7c37SLars Poeschel #define CONFIG_HARD_I2C 182*1c1b7c37SLars Poeschel #define CONFIG_SYS_I2C_SPEED 100000 183*1c1b7c37SLars Poeschel #define CONFIG_SYS_I2C_SLAVE 1 184*1c1b7c37SLars Poeschel #define CONFIG_I2C_MULTI_BUS 185*1c1b7c37SLars Poeschel #define CONFIG_DRIVER_OMAP24XX_I2C 186*1c1b7c37SLars Poeschel #define CONFIG_CMD_EEPROM 187*1c1b7c37SLars Poeschel #define CONFIG_ENV_EEPROM_IS_ON_I2C 188*1c1b7c37SLars Poeschel #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 189*1c1b7c37SLars Poeschel #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 190*1c1b7c37SLars Poeschel #define CONFIG_SYS_I2C_MULTI_EEPROMS 191*1c1b7c37SLars Poeschel 192*1c1b7c37SLars Poeschel #define CONFIG_OMAP_GPIO 193*1c1b7c37SLars Poeschel 194*1c1b7c37SLars Poeschel #define CONFIG_BAUDRATE 115200 195*1c1b7c37SLars Poeschel #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ 196*1c1b7c37SLars Poeschel 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } 197*1c1b7c37SLars Poeschel 198*1c1b7c37SLars Poeschel #define CONFIG_ENV_OVERWRITE 199*1c1b7c37SLars Poeschel #define CONFIG_SYS_CONSOLE_INFO_QUIET 200*1c1b7c37SLars Poeschel 201*1c1b7c37SLars Poeschel #define CONFIG_ENV_IS_NOWHERE 202*1c1b7c37SLars Poeschel 203*1c1b7c37SLars Poeschel /* Defines for SPL */ 204*1c1b7c37SLars Poeschel #define CONFIG_SPL 205*1c1b7c37SLars Poeschel #define CONFIG_SPL_FRAMEWORK 206*1c1b7c37SLars Poeschel #define CONFIG_SPL_TEXT_BASE 0x402F0400 207*1c1b7c37SLars Poeschel #define CONFIG_SPL_MAX_SIZE (101 * 1024) 208*1c1b7c37SLars Poeschel #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 209*1c1b7c37SLars Poeschel 210*1c1b7c37SLars Poeschel #define CONFIG_SPL_BSS_START_ADDR 0x80000000 211*1c1b7c37SLars Poeschel #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 212*1c1b7c37SLars Poeschel 213*1c1b7c37SLars Poeschel #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 214*1c1b7c37SLars Poeschel #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 215*1c1b7c37SLars Poeschel #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 216*1c1b7c37SLars Poeschel #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 217*1c1b7c37SLars Poeschel #define CONFIG_SPL_MMC_SUPPORT 218*1c1b7c37SLars Poeschel #define CONFIG_SPL_FAT_SUPPORT 219*1c1b7c37SLars Poeschel #define CONFIG_SPL_I2C_SUPPORT 220*1c1b7c37SLars Poeschel 221*1c1b7c37SLars Poeschel #define CONFIG_SPL_LIBCOMMON_SUPPORT 222*1c1b7c37SLars Poeschel #define CONFIG_SPL_LIBDISK_SUPPORT 223*1c1b7c37SLars Poeschel #define CONFIG_SPL_LIBGENERIC_SUPPORT 224*1c1b7c37SLars Poeschel #define CONFIG_SPL_SERIAL_SUPPORT 225*1c1b7c37SLars Poeschel #define CONFIG_SPL_GPIO_SUPPORT 226*1c1b7c37SLars Poeschel #define CONFIG_SPL_YMODEM_SUPPORT 227*1c1b7c37SLars Poeschel #define CONFIG_SPL_NET_SUPPORT 228*1c1b7c37SLars Poeschel #define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL" 229*1c1b7c37SLars Poeschel #define CONFIG_SPL_ETH_SUPPORT 230*1c1b7c37SLars Poeschel #define CONFIG_SPL_SPI_SUPPORT 231*1c1b7c37SLars Poeschel #define CONFIG_SPL_SPI_FLASH_SUPPORT 232*1c1b7c37SLars Poeschel #define CONFIG_SPL_SPI_LOAD 233*1c1b7c37SLars Poeschel #define CONFIG_SPL_SPI_BUS 0 234*1c1b7c37SLars Poeschel #define CONFIG_SPL_SPI_CS 0 235*1c1b7c37SLars Poeschel #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 236*1c1b7c37SLars Poeschel #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 237*1c1b7c37SLars Poeschel #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 238*1c1b7c37SLars Poeschel 239*1c1b7c37SLars Poeschel /* 240*1c1b7c37SLars Poeschel * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 241*1c1b7c37SLars Poeschel * 64 bytes before this address should be set aside for u-boot.img's 242*1c1b7c37SLars Poeschel * header. That is 0x800FFFC0--0x80100000 should not be used for any 243*1c1b7c37SLars Poeschel * other needs. 244*1c1b7c37SLars Poeschel */ 245*1c1b7c37SLars Poeschel #define CONFIG_SYS_TEXT_BASE 0x80800000 246*1c1b7c37SLars Poeschel #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 247*1c1b7c37SLars Poeschel #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 248*1c1b7c37SLars Poeschel 249*1c1b7c37SLars Poeschel /* Since SPL did pll and ddr initialization for us, 250*1c1b7c37SLars Poeschel * we don't need to do it twice. 251*1c1b7c37SLars Poeschel */ 252*1c1b7c37SLars Poeschel #ifndef CONFIG_SPL_BUILD 253*1c1b7c37SLars Poeschel #define CONFIG_SKIP_LOWLEVEL_INIT 254*1c1b7c37SLars Poeschel #endif 255*1c1b7c37SLars Poeschel 256*1c1b7c37SLars Poeschel /* 257*1c1b7c37SLars Poeschel * USB configuration 258*1c1b7c37SLars Poeschel */ 259*1c1b7c37SLars Poeschel #define CONFIG_USB_MUSB_DSPS 260*1c1b7c37SLars Poeschel #define CONFIG_ARCH_MISC_INIT 261*1c1b7c37SLars Poeschel #define CONFIG_MUSB_GADGET 262*1c1b7c37SLars Poeschel #define CONFIG_MUSB_PIO_ONLY 263*1c1b7c37SLars Poeschel #define CONFIG_USB_GADGET_DUALSPEED 264*1c1b7c37SLars Poeschel #define CONFIG_MUSB_HOST 265*1c1b7c37SLars Poeschel #define CONFIG_AM335X_USB0 266*1c1b7c37SLars Poeschel #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL 267*1c1b7c37SLars Poeschel #define CONFIG_AM335X_USB1 268*1c1b7c37SLars Poeschel #define CONFIG_AM335X_USB1_MODE MUSB_HOST 269*1c1b7c37SLars Poeschel 270*1c1b7c37SLars Poeschel #ifdef CONFIG_MUSB_HOST 271*1c1b7c37SLars Poeschel #define CONFIG_CMD_USB 272*1c1b7c37SLars Poeschel #define CONFIG_USB_STORAGE 273*1c1b7c37SLars Poeschel #endif 274*1c1b7c37SLars Poeschel 275*1c1b7c37SLars Poeschel #ifdef CONFIG_MUSB_GADGET 276*1c1b7c37SLars Poeschel #define CONFIG_USB_ETHER 277*1c1b7c37SLars Poeschel #define CONFIG_USB_ETH_RNDIS 278*1c1b7c37SLars Poeschel #endif /* CONFIG_MUSB_GADGET */ 279*1c1b7c37SLars Poeschel 280*1c1b7c37SLars Poeschel /* Unsupported features */ 281*1c1b7c37SLars Poeschel #undef CONFIG_USE_IRQ 282*1c1b7c37SLars Poeschel 283*1c1b7c37SLars Poeschel #define CONFIG_CMD_NET 284*1c1b7c37SLars Poeschel #define CONFIG_CMD_DHCP 285*1c1b7c37SLars Poeschel #define CONFIG_CMD_PING 286*1c1b7c37SLars Poeschel #define CONFIG_DRIVER_TI_CPSW 287*1c1b7c37SLars Poeschel #define CONFIG_MII 288*1c1b7c37SLars Poeschel #define CONFIG_BOOTP_DEFAULT 289*1c1b7c37SLars Poeschel #define CONFIG_BOOTP_DNS 290*1c1b7c37SLars Poeschel #define CONFIG_BOOTP_DNS2 291*1c1b7c37SLars Poeschel #define CONFIG_BOOTP_SEND_HOSTNAME 292*1c1b7c37SLars Poeschel #define CONFIG_BOOTP_GATEWAY 293*1c1b7c37SLars Poeschel #define CONFIG_BOOTP_SUBNETMASK 294*1c1b7c37SLars Poeschel #define CONFIG_NET_RETRY_COUNT 10 295*1c1b7c37SLars Poeschel #define CONFIG_NET_MULTI 296*1c1b7c37SLars Poeschel #define CONFIG_PHY_GIGE 297*1c1b7c37SLars Poeschel #define CONFIG_PHYLIB 298*1c1b7c37SLars Poeschel #define CONFIG_PHY_ADDR 0 299*1c1b7c37SLars Poeschel #define CONFIG_PHY_SMSC 300*1c1b7c37SLars Poeschel 301*1c1b7c37SLars Poeschel #endif /* ! __CONFIG_PCM051_H */ 302