1 /* 2 * (C) Copyright 2003 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 /* 9 * This file contains the configuration parameters for the dbau1x00 board. 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #define CONFIG_PB1X00 1 16 #define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */ 17 18 #ifdef CONFIG_PB1000 19 #define CONFIG_SOC_AU1000 1 20 #else 21 #ifdef CONFIG_PB1100 22 #define CONFIG_SOC_AU1100 1 23 #else 24 #ifdef CONFIG_PB1500 25 #define CONFIG_SOC_AU1500 1 26 #else 27 #error "No valid board set" 28 #endif 29 #endif 30 #endif 31 32 #define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */ 33 34 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ 35 36 #define CONFIG_BAUDRATE 115200 37 38 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 39 #undef CONFIG_BOOTARGS 40 41 #define CONFIG_EXTRA_ENV_SETTINGS \ 42 "addmisc=setenv bootargs ${bootargs} " \ 43 "console=ttyS0,${baudrate} " \ 44 "panic=1\0" \ 45 "bootfile=/vmlinux.img\0" \ 46 "load=tftp 80500000 ${u-boot}\0" \ 47 "" 48 /* Boot from NFS root */ 49 #define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm" 50 51 /* 52 * Miscellaneous configurable options 53 */ 54 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 55 #define CONFIG_SYS_PROMPT "Pb1x00 # " /* Monitor Command Prompt */ 56 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 57 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 58 #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ 59 60 #define CONFIG_SYS_MALLOC_LEN 128*1024 61 62 #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 63 64 #define CONFIG_SYS_MIPS_TIMER_FREQ 396000000 65 66 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ 67 68 #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ 69 70 #define CONFIG_SYS_MEMTEST_START 0x80100000 71 #undef CONFIG_SYS_MEMTEST_START 72 #define CONFIG_SYS_MEMTEST_START 0x80200000 73 #define CONFIG_SYS_MEMTEST_END 0x83800000 74 75 /*----------------------------------------------------------------------- 76 * FLASH and environment organization 77 */ 78 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ 79 #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ 80 81 #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */ 82 #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ 83 84 /* The following #defines are needed to get flash environment right */ 85 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 86 #define CONFIG_SYS_MONITOR_LEN (192 << 10) 87 88 #define CONFIG_SYS_INIT_SP_OFFSET 0x4000000 89 90 /* We boot from this flash, selected with dip switch */ 91 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2 92 93 /* timeout values are in ticks */ 94 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ 95 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ 96 97 #define CONFIG_ENV_IS_NOWHERE 1 98 99 /* Address and size of Primary Environment Sector */ 100 #define CONFIG_ENV_ADDR 0xB0030000 101 #define CONFIG_ENV_SIZE 0x10000 102 103 #define CONFIG_FLASH_16BIT 104 105 #define CONFIG_NR_DRAM_BANKS 2 106 107 108 #define CONFIG_MEMSIZE_IN_BYTES 109 110 111 /*---USB -------------------------------------------*/ 112 #if 0 113 #define CONFIG_USB_OHCI 114 #define CONFIG_USB_STORAGE 115 #define CONFIG_DOS_PARTITION 116 #endif 117 118 /*---ATA PCMCIA ------------------------------------*/ 119 #if 0 120 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ 121 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000 122 #define CONFIG_PCMCIA_SLOT_A 123 124 #define CONFIG_ATAPI 1 125 #define CONFIG_MAC_PARTITION 1 126 127 /* We run CF in "true ide" mode or a harddrive via pcmcia */ 128 #define CONFIG_IDE_PCMCIA 1 129 130 /* We only support one slot for now */ 131 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ 132 #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ 133 134 #undef CONFIG_IDE_LED /* LED for ide not supported */ 135 #undef CONFIG_IDE_RESET /* reset for ide not supported */ 136 137 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 138 139 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR 140 141 /* Offset for data I/O */ 142 #define CONFIG_SYS_ATA_DATA_OFFSET 8 143 144 /* Offset for normal register accesses */ 145 #define CONFIG_SYS_ATA_REG_OFFSET 0 146 147 /* Offset for alternate registers */ 148 #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 149 150 #endif 151 /*----------------------------------------------------------------------- 152 * Cache Configuration 153 */ 154 #define CONFIG_SYS_DCACHE_SIZE 16384 155 #define CONFIG_SYS_ICACHE_SIZE 16384 156 #define CONFIG_SYS_CACHELINE_SIZE 32 157 158 159 /* 160 * BOOTP options 161 */ 162 #define CONFIG_BOOTP_BOOTFILESIZE 163 #define CONFIG_BOOTP_BOOTPATH 164 #define CONFIG_BOOTP_GATEWAY 165 #define CONFIG_BOOTP_HOSTNAME 166 167 168 /* 169 * Command line configuration. 170 */ 171 #include <config_cmd_default.h> 172 173 #define CONFIG_CMD_DHCP 174 #define CONFIG_CMD_ELF 175 #define CONFIG_CMD_MII 176 #define CONFIG_CMD_PING 177 178 #undef CONFIG_CMD_SAVEENV 179 #undef CONFIG_CMD_FAT 180 #undef CONFIG_CMD_FLASH 181 #undef CONFIG_CMD_FPGA 182 #undef CONFIG_CMD_IDE 183 #undef CONFIG_CMD_LOADS 184 #undef CONFIG_CMD_RUN 185 #undef CONFIG_CMD_LOADB 186 #undef CONFIG_CMD_ELF 187 #undef CONFIG_CMD_BDI 188 #undef CONFIG_CMD_BEDBUG 189 190 #endif /* __CONFIG_H */ 191