xref: /rk3399_rockchip-uboot/include/configs/pb1x00.h (revision 1e87f9ced4db17d2e06db5a9af6cd89ca680957a)
1 /*
2  * (C) Copyright 2003
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 /*
9  * This file contains the configuration parameters for the dbau1x00 board.
10  */
11 
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14 
15 #define CONFIG_PB1X00		1
16 #define CONFIG_SOC_AU1X00	1  /* alchemy series cpu */
17 
18 #ifdef CONFIG_PB1000
19 #define CONFIG_SOC_AU1000	1
20 #else
21 #ifdef CONFIG_PB1100
22 #define CONFIG_SOC_AU1100	1
23 #else
24 #ifdef CONFIG_PB1500
25 #define CONFIG_SOC_AU1500	1
26 #else
27 #error "No valid board set"
28 #endif
29 #endif
30 #endif
31 
32 #define	CONFIG_TIMESTAMP		/* Print image info with timestamp */
33 
34 #define	CONFIG_EXTRA_ENV_SETTINGS					\
35 	"addmisc=setenv bootargs ${bootargs} "				\
36 		"console=ttyS0,${baudrate} "				\
37 		"panic=1\0"						\
38 	"bootfile=/vmlinux.img\0"				\
39 	"load=tftp 80500000 ${u-boot}\0"				\
40 	""
41 /* Boot from NFS root */
42 #define CONFIG_BOOTCOMMAND	"bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
43 
44 /*
45  * Miscellaneous configurable options
46  */
47 #define	CONFIG_SYS_LONGHELP				/* undef to save memory      */
48 #define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size   */
49 #define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)  /* Print Buffer Size */
50 #define	CONFIG_SYS_MAXARGS		16		/* max number of command args*/
51 
52 #define CONFIG_SYS_MALLOC_LEN		128*1024
53 
54 #define CONFIG_SYS_BOOTPARAMS_LEN	128*1024
55 
56 #define CONFIG_SYS_MIPS_TIMER_FREQ	396000000
57 
58 #define CONFIG_SYS_SDRAM_BASE		0x80000000     /* Cached addr */
59 
60 #define	CONFIG_SYS_LOAD_ADDR		0x81000000     /* default load address	*/
61 
62 #define CONFIG_SYS_MEMTEST_START	0x80100000
63 #undef CONFIG_SYS_MEMTEST_START
64 #define CONFIG_SYS_MEMTEST_START       0x80200000
65 #define CONFIG_SYS_MEMTEST_END		0x83800000
66 
67 /*-----------------------------------------------------------------------
68  * FLASH and environment organization
69  */
70 #define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks */
71 #define CONFIG_SYS_MAX_FLASH_SECT	(128)	/* max number of sectors on one chip */
72 
73 #define PHYS_FLASH_1		0xbec00000 /* Flash Bank #1 */
74 #define PHYS_FLASH_2		0xbfc00000 /* Flash Bank #2 */
75 
76 #define	CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
77 #define	CONFIG_SYS_MONITOR_LEN		(192 << 10)
78 
79 #define CONFIG_SYS_INIT_SP_OFFSET	0x4000000
80 
81 /* We boot from this flash, selected with dip switch */
82 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_2
83 
84 /* timeout values are in ticks */
85 #define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
86 #define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
87 
88 /* Address and size of Primary Environment Sector	*/
89 #define CONFIG_ENV_ADDR		0xB0030000
90 #define CONFIG_ENV_SIZE		0x10000
91 
92 #define CONFIG_FLASH_16BIT
93 
94 #define CONFIG_NR_DRAM_BANKS	2
95 
96 #define CONFIG_MEMSIZE_IN_BYTES
97 
98 /*---USB -------------------------------------------*/
99 #if 0
100 #define CONFIG_USB_OHCI
101 #endif
102 
103 /*---ATA PCMCIA ------------------------------------*/
104 #if 0
105 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
106 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
107 #define CONFIG_PCMCIA_SLOT_A
108 
109 #define CONFIG_ATAPI 1
110 
111 /* We run CF in "true ide" mode or a harddrive via pcmcia */
112 #define CONFIG_IDE_PCMCIA 1
113 
114 /* We only support one slot for now */
115 #define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
116 #define CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 1 drive per IDE bus	*/
117 
118 #undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
119 #undef	CONFIG_IDE_RESET		/* reset for ide not supported	*/
120 
121 #define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
122 
123 #define CONFIG_SYS_ATA_BASE_ADDR       CONFIG_SYS_PCMCIA_MEM_ADDR
124 
125 /* Offset for data I/O			*/
126 #define CONFIG_SYS_ATA_DATA_OFFSET     8
127 
128 /* Offset for normal register accesses  */
129 #define CONFIG_SYS_ATA_REG_OFFSET      0
130 
131 /* Offset for alternate registers       */
132 #define CONFIG_SYS_ATA_ALT_OFFSET      0x0100
133 
134 #endif
135 
136 /*
137  * BOOTP options
138  */
139 #define CONFIG_BOOTP_BOOTFILESIZE
140 #define CONFIG_BOOTP_BOOTPATH
141 #define CONFIG_BOOTP_GATEWAY
142 #define CONFIG_BOOTP_HOSTNAME
143 
144 /*
145  * Command line configuration.
146  */
147 
148 #endif	/* __CONFIG_H */
149