xref: /rk3399_rockchip-uboot/include/configs/pb1x00.h (revision 03efcb05054fb7da9ef5fc76244bfa40e2e2c4b5)
1 /*
2  * (C) Copyright 2003
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 /*
9  * This file contains the configuration parameters for the dbau1x00 board.
10  */
11 
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14 
15 #define CONFIG_MIPS32		1  /* MIPS32 CPU core	*/
16 #define CONFIG_PB1X00		1
17 #define CONFIG_SOC_AU1X00	1  /* alchemy series cpu */
18 
19 #ifdef CONFIG_PB1000
20 #define CONFIG_SOC_AU1000	1
21 #else
22 #ifdef CONFIG_PB1100
23 #define CONFIG_SOC_AU1100	1
24 #else
25 #ifdef CONFIG_PB1500
26 #define CONFIG_SOC_AU1500	1
27 #else
28 #error "No valid board set"
29 #endif
30 #endif
31 #endif
32 
33 #define CONFIG_SYS_LITTLE_ENDIAN
34 
35 #define CONFIG_ETHADDR		DE:AD:BE:EF:01:01    /* Ethernet address */
36 
37 #define CONFIG_BOOTDELAY	2	/* autoboot after 2 seconds	*/
38 
39 #define CONFIG_BAUDRATE		115200
40 
41 #define	CONFIG_TIMESTAMP		/* Print image info with timestamp */
42 #undef	CONFIG_BOOTARGS
43 
44 #define	CONFIG_EXTRA_ENV_SETTINGS					\
45 	"addmisc=setenv bootargs ${bootargs} "				\
46 		"console=ttyS0,${baudrate} "				\
47 		"panic=1\0"						\
48 	"bootfile=/vmlinux.img\0"				\
49 	"load=tftp 80500000 ${u-boot}\0"				\
50 	""
51 /* Boot from NFS root */
52 #define CONFIG_BOOTCOMMAND	"bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
53 
54 /*
55  * Miscellaneous configurable options
56  */
57 #define	CONFIG_SYS_LONGHELP				/* undef to save memory      */
58 #define	CONFIG_SYS_PROMPT		"Pb1x00 # "	/* Monitor Command Prompt    */
59 #define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size   */
60 #define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)  /* Print Buffer Size */
61 #define	CONFIG_SYS_MAXARGS		16		/* max number of command args*/
62 
63 #define CONFIG_SYS_MALLOC_LEN		128*1024
64 
65 #define CONFIG_SYS_BOOTPARAMS_LEN	128*1024
66 
67 #define CONFIG_SYS_MIPS_TIMER_FREQ	396000000
68 
69 #define CONFIG_SYS_HZ			1000
70 
71 #define CONFIG_SYS_SDRAM_BASE		0x80000000     /* Cached addr */
72 
73 #define	CONFIG_SYS_LOAD_ADDR		0x81000000     /* default load address	*/
74 
75 #define CONFIG_SYS_MEMTEST_START	0x80100000
76 #undef CONFIG_SYS_MEMTEST_START
77 #define CONFIG_SYS_MEMTEST_START       0x80200000
78 #define CONFIG_SYS_MEMTEST_END		0x83800000
79 
80 /*-----------------------------------------------------------------------
81  * FLASH and environment organization
82  */
83 #define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks */
84 #define CONFIG_SYS_MAX_FLASH_SECT	(128)	/* max number of sectors on one chip */
85 
86 #define PHYS_FLASH_1		0xbec00000 /* Flash Bank #1 */
87 #define PHYS_FLASH_2		0xbfc00000 /* Flash Bank #2 */
88 
89 /* The following #defines are needed to get flash environment right */
90 #define	CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
91 #define	CONFIG_SYS_MONITOR_LEN		(192 << 10)
92 
93 #define CONFIG_SYS_INIT_SP_OFFSET	0x4000000
94 
95 /* We boot from this flash, selected with dip switch */
96 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_2
97 
98 /* timeout values are in ticks */
99 #define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
100 #define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
101 
102 #define	CONFIG_ENV_IS_NOWHERE	1
103 
104 /* Address and size of Primary Environment Sector	*/
105 #define CONFIG_ENV_ADDR		0xB0030000
106 #define CONFIG_ENV_SIZE		0x10000
107 
108 #define CONFIG_FLASH_16BIT
109 
110 #define CONFIG_NR_DRAM_BANKS	2
111 
112 
113 #define CONFIG_MEMSIZE_IN_BYTES
114 
115 
116 /*---USB -------------------------------------------*/
117 #if 0
118 #define CONFIG_USB_OHCI
119 #define CONFIG_USB_STORAGE
120 #define CONFIG_DOS_PARTITION
121 #endif
122 
123 /*---ATA PCMCIA ------------------------------------*/
124 #if 0
125 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
126 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
127 #define CONFIG_PCMCIA_SLOT_A
128 
129 #define CONFIG_ATAPI 1
130 #define CONFIG_MAC_PARTITION 1
131 
132 /* We run CF in "true ide" mode or a harddrive via pcmcia */
133 #define CONFIG_IDE_PCMCIA 1
134 
135 /* We only support one slot for now */
136 #define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
137 #define CONFIG_SYS_IDE_MAXDEVICE	1	/* max. 1 drive per IDE bus	*/
138 
139 #undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
140 #undef	CONFIG_IDE_RESET		/* reset for ide not supported	*/
141 
142 #define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
143 
144 #define CONFIG_SYS_ATA_BASE_ADDR       CONFIG_SYS_PCMCIA_MEM_ADDR
145 
146 /* Offset for data I/O			*/
147 #define CONFIG_SYS_ATA_DATA_OFFSET     8
148 
149 /* Offset for normal register accesses  */
150 #define CONFIG_SYS_ATA_REG_OFFSET      0
151 
152 /* Offset for alternate registers       */
153 #define CONFIG_SYS_ATA_ALT_OFFSET      0x0100
154 
155 #endif
156 /*-----------------------------------------------------------------------
157  * Cache Configuration
158  */
159 #define CONFIG_SYS_DCACHE_SIZE		16384
160 #define CONFIG_SYS_ICACHE_SIZE		16384
161 #define CONFIG_SYS_CACHELINE_SIZE	32
162 
163 
164 /*
165  * BOOTP options
166  */
167 #define CONFIG_BOOTP_BOOTFILESIZE
168 #define CONFIG_BOOTP_BOOTPATH
169 #define CONFIG_BOOTP_GATEWAY
170 #define CONFIG_BOOTP_HOSTNAME
171 
172 
173 /*
174  * Command line configuration.
175  */
176 #include <config_cmd_default.h>
177 
178 #define CONFIG_CMD_DHCP
179 #define CONFIG_CMD_ELF
180 #define CONFIG_CMD_MII
181 #define CONFIG_CMD_PING
182 
183 #undef CONFIG_CMD_SAVEENV
184 #undef CONFIG_CMD_FAT
185 #undef CONFIG_CMD_FLASH
186 #undef CONFIG_CMD_FPGA
187 #undef CONFIG_CMD_IDE
188 #undef CONFIG_CMD_LOADS
189 #undef CONFIG_CMD_RUN
190 #undef CONFIG_CMD_LOADB
191 #undef CONFIG_CMD_ELF
192 #undef CONFIG_CMD_BDI
193 #undef CONFIG_CMD_BEDBUG
194 
195 #endif	/* __CONFIG_H */
196