1 /* 2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. 3 * Copyright (C) 2014 Bachmann electronic GmbH 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #include "mx6_common.h" 12 13 /* Size of malloc() pool */ 14 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 15 16 #define CONFIG_BOARD_EARLY_INIT_F 17 #define CONFIG_MISC_INIT_R 18 #define CONFIG_MXC_GPIO 19 20 /* FUSE Configs */ 21 #define CONFIG_CMD_FUSE 22 #define CONFIG_MXC_OCOTP 23 24 /* UART Configs */ 25 #define CONFIG_MXC_UART 26 #define CONFIG_MXC_UART_BASE UART1_BASE 27 28 /* SF Configs */ 29 #define CONFIG_CMD_SF 30 #define CONFIG_SPI 31 #define CONFIG_SPI_FLASH 32 #define CONFIG_SPI_FLASH_STMICRO 33 #define CONFIG_SPI_FLASH_WINBOND 34 #define CONFIG_SPI_FLASH_MACRONIX 35 #define CONFIG_SPI_FLASH_SST 36 #define CONFIG_MXC_SPI 37 #define CONFIG_SF_DEFAULT_BUS 2 38 #define CONFIG_SF_DEFAULT_CS 0 39 #define CONFIG_SF_DEFAULT_SPEED 25000000 40 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 41 42 /* IO expander */ 43 #define CONFIG_PCA953X 44 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 45 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } 46 #define CONFIG_CMD_PCA953X 47 #define CONFIG_CMD_PCA953X_INFO 48 49 /* I2C Configs */ 50 #define CONFIG_CMD_I2C 51 #define CONFIG_SYS_I2C 52 #define CONFIG_SYS_I2C_MXC 53 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 54 #define CONFIG_SYS_I2C_SPEED 100000 55 56 /* OCOTP Configs */ 57 #define CONFIG_CMD_IMXOTP 58 #define CONFIG_IMX_OTP 59 #define IMX_OTP_BASE OCOTP_BASE_ADDR 60 #define IMX_OTP_ADDR_MAX 0x7F 61 #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA 62 #define IMX_OTPWRITE_ENABLED 63 64 /* MMC Configs */ 65 #define CONFIG_FSL_ESDHC 66 #define CONFIG_FSL_USDHC 67 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 68 #define CONFIG_SYS_FSL_USDHC_NUM 2 69 70 #define CONFIG_MMC 71 #define CONFIG_CMD_MMC 72 #define CONFIG_GENERIC_MMC 73 #define CONFIG_BOUNCE_BUFFER 74 75 /* USB Configs */ 76 #define CONFIG_CMD_USB 77 #define CONFIG_USB_STORAGE 78 #define CONFIG_USB_EHCI 79 #define CONFIG_USB_EHCI_MX6 80 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 81 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 82 83 #ifdef CONFIG_MX6Q 84 #define CONFIG_CMD_SATA 85 #endif 86 87 /* 88 * SATA Configs 89 */ 90 #ifdef CONFIG_CMD_SATA 91 #define CONFIG_DWC_AHSATA 92 #define CONFIG_SYS_SATA_MAX_DEVICE 1 93 #define CONFIG_DWC_AHSATA_PORT_ID 0 94 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 95 #define CONFIG_LBA48 96 #define CONFIG_LIBATA 97 #endif 98 99 100 /* SPL */ 101 #ifdef CONFIG_SPL 102 #include "imx6_spl.h" 103 #define CONFIG_SPL_SPI_SUPPORT 104 #define CONFIG_SPL_LIBCOMMON_SUPPORT 105 #define CONFIG_SPL_SPI_FLASH_SUPPORT 106 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 107 #define CONFIG_SPL_SPI_LOAD 108 #endif 109 110 #define CONFIG_CMD_PING 111 #define CONFIG_CMD_DHCP 112 #define CONFIG_CMD_MII 113 #define CONFIG_CMD_NET 114 #define CONFIG_FEC_MXC 115 #define CONFIG_MII 116 #define IMX_FEC_BASE ENET_BASE_ADDR 117 #define CONFIG_FEC_XCV_TYPE MII100 118 #define CONFIG_ETHPRIME "FEC" 119 #define CONFIG_FEC_MXC_PHYADDR 0x5 120 #define CONFIG_PHYLIB 121 #define CONFIG_PHY_SMSC 122 123 #ifndef CONFIG_SPL 124 #define CONFIG_CMD_EEPROM 125 #define CONFIG_ENV_EEPROM_IS_ON_I2C 126 #define CONFIG_SYS_I2C_EEPROM_BUS 1 127 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 128 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 129 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 130 #define CONFIG_SYS_I2C_MULTI_EEPROMS 131 #endif 132 133 /* Miscellaneous commands */ 134 #define CONFIG_CMD_BMODE 135 #define CONFIG_CMD_SETEXPR 136 137 /* allow to overwrite serial and ethaddr */ 138 #define CONFIG_ENV_OVERWRITE 139 #define CONFIG_CONS_INDEX 1 140 #define CONFIG_BAUDRATE 115200 141 142 /* Command definition */ 143 144 #define CONFIG_BOOTDELAY 2 145 146 #define CONFIG_PREBOOT "" 147 148 #define CONFIG_LOADADDR 0x12000000 149 #define CONFIG_SYS_TEXT_BASE 0x17800000 150 151 /* Miscellaneous configurable options */ 152 #define CONFIG_SYS_LONGHELP 153 #define CONFIG_SYS_HUSH_PARSER 154 #define CONFIG_SYS_CBSIZE 1024 155 156 /* Print Buffer Size */ 157 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 158 #define CONFIG_SYS_MAXARGS 16 159 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 160 161 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 162 163 #define CONFIG_CMDLINE_EDITING 164 165 /* Physical Memory Map */ 166 #define CONFIG_NR_DRAM_BANKS 1 167 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 168 169 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 170 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 171 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 172 173 #define CONFIG_SYS_INIT_SP_OFFSET \ 174 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 175 #define CONFIG_SYS_INIT_SP_ADDR \ 176 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 177 178 /* Environment organization */ 179 #define CONFIG_ENV_IS_IN_SPI_FLASH 180 #define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */ 181 #define CONFIG_ENV_OFFSET (1024 * 1024) 182 /* M25P16 has an erase size of 64 KiB */ 183 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 184 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 185 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 186 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 187 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 188 189 #define CONFIG_OF_LIBFDT 190 #define CONFIG_CMD_BOOTZ 191 192 #ifndef CONFIG_SYS_DCACHE_OFF 193 #define CONFIG_CMD_CACHE 194 #endif 195 196 #define CONFIG_CMD_BOOTZ 197 #define CONFIG_SUPPORT_RAW_INITRD 198 199 /* FS Configs */ 200 #define CONFIG_CMD_EXT3 201 #define CONFIG_CMD_EXT4 202 #define CONFIG_DOS_PARTITION 203 #define CONFIG_CMD_FS_GENERIC 204 #define CONFIG_LIB_UUID 205 #define CONFIG_CMD_FS_UUID 206 207 #define CONFIG_BOOTP_SERVERIP 208 #define CONFIG_BOOTP_BOOTFILE 209 210 #endif /* __CONFIG_H */ 211