xref: /rk3399_rockchip-uboot/include/configs/origen.h (revision 7741c8b8c9215c6def36f24ac0b2d71543dd47ab)
1b9a1ef21SChander Kashyap /*
2b9a1ef21SChander Kashyap  * Copyright (C) 2011 Samsung Electronics
3b9a1ef21SChander Kashyap  *
4393cb361SChander Kashyap  * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
5b9a1ef21SChander Kashyap  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
7b9a1ef21SChander Kashyap  */
8b9a1ef21SChander Kashyap 
9bf7716d6SPiotr Wilczek #ifndef __CONFIG_ORIGEN_H
10bf7716d6SPiotr Wilczek #define __CONFIG_ORIGEN_H
11bf7716d6SPiotr Wilczek 
124c7bb1d2SSimon Glass #include <configs/exynos4-common.h>
13bf7716d6SPiotr Wilczek 
14bf7716d6SPiotr Wilczek #define CONFIG_SYS_PROMPT		"ORIGEN # "
15bf7716d6SPiotr Wilczek 
16b9a1ef21SChander Kashyap 
17b9a1ef21SChander Kashyap /* High Level Configuration Options */
18393cb361SChander Kashyap #define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
19b9a1ef21SChander Kashyap #define CONFIG_ORIGEN			1	/* working with ORIGEN*/
20b9a1ef21SChander Kashyap 
21b9a1ef21SChander Kashyap #define CONFIG_SYS_DCACHE_OFF		1
22b9a1ef21SChander Kashyap 
23bf7716d6SPiotr Wilczek /* ORIGEN has 4 bank of DRAM */
24bf7716d6SPiotr Wilczek #define CONFIG_NR_DRAM_BANKS		4
25b9a1ef21SChander Kashyap #define CONFIG_SYS_SDRAM_BASE		0x40000000
26bf7716d6SPiotr Wilczek #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
27bf7716d6SPiotr Wilczek #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
28bf7716d6SPiotr Wilczek 
29bf7716d6SPiotr Wilczek /* memtest works on */
30bf7716d6SPiotr Wilczek #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
31bf7716d6SPiotr Wilczek #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
32bf7716d6SPiotr Wilczek #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
33bf7716d6SPiotr Wilczek 
34b9a1ef21SChander Kashyap #define CONFIG_SYS_TEXT_BASE		0x43E00000
35b9a1ef21SChander Kashyap 
36b9a1ef21SChander Kashyap #define CONFIG_MACH_TYPE		MACH_TYPE_ORIGEN
37b9a1ef21SChander Kashyap 
38bf7716d6SPiotr Wilczek /* select serial console configuration */
39bf7716d6SPiotr Wilczek #define CONFIG_SERIAL2
40bf7716d6SPiotr Wilczek #define CONFIG_BAUDRATE			115200
41bf7716d6SPiotr Wilczek 
42bf7716d6SPiotr Wilczek /* Console configuration */
43bf7716d6SPiotr Wilczek #define CONFIG_SYS_CONSOLE_INFO_QUIET
44bf7716d6SPiotr Wilczek #define CONFIG_SYS_CONSOLE_IS_IN_ENV
45bf7716d6SPiotr Wilczek #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"
46bf7716d6SPiotr Wilczek 
47bf7716d6SPiotr Wilczek #define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
48bf7716d6SPiotr Wilczek 
49bf7716d6SPiotr Wilczek #define CONFIG_SYS_MONITOR_BASE	0x00000000
50bf7716d6SPiotr Wilczek 
51b9a1ef21SChander Kashyap /* Power Down Modes */
52b9a1ef21SChander Kashyap #define S5P_CHECK_SLEEP			0x00000BAD
53b9a1ef21SChander Kashyap #define S5P_CHECK_DIDLE			0xBAD00000
54b9a1ef21SChander Kashyap #define S5P_CHECK_LPA			0xABAD0000
55b9a1ef21SChander Kashyap 
5680615006SJoe Hershberger #undef CONFIG_CMD_PING
57b9a1ef21SChander Kashyap #define CONFIG_CMD_ELF
58b9a1ef21SChander Kashyap #define CONFIG_CMD_DHCP
59*7741c8b8SGuillaume GARDET #define CONFIG_CMD_EXT2
60*7741c8b8SGuillaume GARDET #define CONFIG_CMD_FS_GENERIC
61*7741c8b8SGuillaume GARDET #define CONFIG_CMD_BOOTZ
62*7741c8b8SGuillaume GARDET #define CONFIG_SUPPORT_RAW_INITRD
63b9a1ef21SChander Kashyap #undef CONFIG_CMD_NET
64b9a1ef21SChander Kashyap #undef CONFIG_CMD_NFS
65b9a1ef21SChander Kashyap 
6698a48c5dSChander Kashyap /* MMC SPL */
6798a48c5dSChander Kashyap #define COPY_BL2_FNPTR_ADDR	0x02020030
688a00061eSInderpal Singh #define CONFIG_SPL_TEXT_BASE	0x02021410
698a00061eSInderpal Singh 
70*7741c8b8SGuillaume GARDET #define CONFIG_EXTRA_ENV_SETTINGS \
71*7741c8b8SGuillaume GARDET 	"loadaddr=0x40007000\0" \
72*7741c8b8SGuillaume GARDET 	"rdaddr=0x48000000\0" \
73*7741c8b8SGuillaume GARDET 	"kerneladdr=0x40007000\0" \
74*7741c8b8SGuillaume GARDET 	"ramdiskaddr=0x48000000\0" \
75*7741c8b8SGuillaume GARDET 	"console=ttySAC2,115200n8\0" \
76*7741c8b8SGuillaume GARDET 	"mmcdev=0\0" \
77*7741c8b8SGuillaume GARDET 	"bootenv=uEnv.txt\0" \
78*7741c8b8SGuillaume GARDET 	"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
79*7741c8b8SGuillaume GARDET 	"importbootenv=echo Importing environment from mmc ...; " \
80*7741c8b8SGuillaume GARDET 		"env import -t $loadaddr $filesize\0" \
81*7741c8b8SGuillaume GARDET         "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
82*7741c8b8SGuillaume GARDET         "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
83*7741c8b8SGuillaume GARDET                 "source ${loadaddr}\0"
84*7741c8b8SGuillaume GARDET #define CONFIG_BOOTCOMMAND \
85*7741c8b8SGuillaume GARDET 	"if mmc rescan; then " \
86*7741c8b8SGuillaume GARDET 		"echo SD/MMC found on device ${mmcdev};" \
87*7741c8b8SGuillaume GARDET 		"if run loadbootenv; then " \
88*7741c8b8SGuillaume GARDET 			"echo Loaded environment from ${bootenv};" \
89*7741c8b8SGuillaume GARDET 			"run importbootenv;" \
90*7741c8b8SGuillaume GARDET 		"fi;" \
91*7741c8b8SGuillaume GARDET 		"if test -n $uenvcmd; then " \
92*7741c8b8SGuillaume GARDET 			"echo Running uenvcmd ...;" \
93*7741c8b8SGuillaume GARDET 			"run uenvcmd;" \
94*7741c8b8SGuillaume GARDET 		"fi;" \
95*7741c8b8SGuillaume GARDET 		"if run loadbootscript; then " \
96*7741c8b8SGuillaume GARDET 			"run bootscript; " \
97*7741c8b8SGuillaume GARDET 		"fi; " \
98*7741c8b8SGuillaume GARDET 	"fi;" \
99*7741c8b8SGuillaume GARDET 	"load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
100b9a1ef21SChander Kashyap 
101b9a1ef21SChander Kashyap #define CONFIG_IDENT_STRING		" for ORIGEN"
102b9a1ef21SChander Kashyap 
103b9a1ef21SChander Kashyap #define CONFIG_CLK_1000_400_200
104b9a1ef21SChander Kashyap 
105b9a1ef21SChander Kashyap /* MIU (Memory Interleaving Unit) */
106b9a1ef21SChander Kashyap #define CONFIG_MIU_2BIT_21_7_INTERLEAVED
107b9a1ef21SChander Kashyap 
108bf7716d6SPiotr Wilczek #define CONFIG_ENV_IS_IN_MMC
109b9a1ef21SChander Kashyap #define CONFIG_SYS_MMC_ENV_DEV		0
110b9a1ef21SChander Kashyap #define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KB */
111b9a1ef21SChander Kashyap #define RESERVE_BLOCK_SIZE		(512)
112b9a1ef21SChander Kashyap #define BL1_SIZE			(16 << 10) /*16 K reserved for BL1*/
113b9a1ef21SChander Kashyap #define CONFIG_ENV_OFFSET		(RESERVE_BLOCK_SIZE + BL1_SIZE)
114b9a1ef21SChander Kashyap 
115643be9c0SRajeshwari Shinde #define CONFIG_SPL_LDSCRIPT	"board/samsung/common/exynos-uboot-spl.lds"
116643be9c0SRajeshwari Shinde #define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
117643be9c0SRajeshwari Shinde 
118643be9c0SRajeshwari Shinde #define CONFIG_SYS_INIT_SP_ADDR		0x02040000
11998a48c5dSChander Kashyap 
12098a48c5dSChander Kashyap /* U-boot copy size from boot Media to DRAM.*/
12198a48c5dSChander Kashyap #define COPY_BL2_SIZE		0x80000
12298a48c5dSChander Kashyap #define BL2_START_OFFSET	((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
12398a48c5dSChander Kashyap #define BL2_SIZE_BLOC_COUNT	(COPY_BL2_SIZE/512)
124099e884aSAngus Ainslie 
125b9a1ef21SChander Kashyap #endif	/* __CONFIG_H */
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