xref: /rk3399_rockchip-uboot/include/configs/origen.h (revision 4c7bb1d2e0526d26972969d4c01fd6c760d4d865)
1b9a1ef21SChander Kashyap /*
2b9a1ef21SChander Kashyap  * Copyright (C) 2011 Samsung Electronics
3b9a1ef21SChander Kashyap  *
4393cb361SChander Kashyap  * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
5b9a1ef21SChander Kashyap  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
7b9a1ef21SChander Kashyap  */
8b9a1ef21SChander Kashyap 
9bf7716d6SPiotr Wilczek #ifndef __CONFIG_ORIGEN_H
10bf7716d6SPiotr Wilczek #define __CONFIG_ORIGEN_H
11bf7716d6SPiotr Wilczek 
12*4c7bb1d2SSimon Glass #include <configs/exynos4-common.h>
13bf7716d6SPiotr Wilczek 
14bf7716d6SPiotr Wilczek #define CONFIG_SYS_PROMPT		"ORIGEN # "
15bf7716d6SPiotr Wilczek 
16b9a1ef21SChander Kashyap 
17b9a1ef21SChander Kashyap /* High Level Configuration Options */
18393cb361SChander Kashyap #define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
19b9a1ef21SChander Kashyap #define CONFIG_ORIGEN			1	/* working with ORIGEN*/
20b9a1ef21SChander Kashyap 
21b9a1ef21SChander Kashyap #define CONFIG_SYS_DCACHE_OFF		1
22b9a1ef21SChander Kashyap 
23bf7716d6SPiotr Wilczek /* ORIGEN has 4 bank of DRAM */
24bf7716d6SPiotr Wilczek #define CONFIG_NR_DRAM_BANKS		4
25b9a1ef21SChander Kashyap #define CONFIG_SYS_SDRAM_BASE		0x40000000
26bf7716d6SPiotr Wilczek #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
27bf7716d6SPiotr Wilczek #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
28bf7716d6SPiotr Wilczek 
29bf7716d6SPiotr Wilczek /* memtest works on */
30bf7716d6SPiotr Wilczek #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
31bf7716d6SPiotr Wilczek #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
32bf7716d6SPiotr Wilczek #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
33bf7716d6SPiotr Wilczek 
34b9a1ef21SChander Kashyap #define CONFIG_SYS_TEXT_BASE		0x43E00000
35b9a1ef21SChander Kashyap 
36b9a1ef21SChander Kashyap #define CONFIG_MACH_TYPE		MACH_TYPE_ORIGEN
37b9a1ef21SChander Kashyap 
38bf7716d6SPiotr Wilczek /* Size of malloc() pool */
39bf7716d6SPiotr Wilczek #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (80 * SZ_1M))
40bf7716d6SPiotr Wilczek 
41bf7716d6SPiotr Wilczek /* select serial console configuration */
42bf7716d6SPiotr Wilczek #define CONFIG_SERIAL2
43bf7716d6SPiotr Wilczek #define CONFIG_BAUDRATE			115200
44bf7716d6SPiotr Wilczek 
45bf7716d6SPiotr Wilczek /* Console configuration */
46bf7716d6SPiotr Wilczek #define CONFIG_SYS_CONSOLE_INFO_QUIET
47bf7716d6SPiotr Wilczek #define CONFIG_SYS_CONSOLE_IS_IN_ENV
48bf7716d6SPiotr Wilczek #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"
49bf7716d6SPiotr Wilczek 
50bf7716d6SPiotr Wilczek #define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
51bf7716d6SPiotr Wilczek 
52bf7716d6SPiotr Wilczek #define CONFIG_SYS_MONITOR_BASE	0x00000000
53bf7716d6SPiotr Wilczek 
54b9a1ef21SChander Kashyap /* Power Down Modes */
55b9a1ef21SChander Kashyap #define S5P_CHECK_SLEEP			0x00000BAD
56b9a1ef21SChander Kashyap #define S5P_CHECK_DIDLE			0xBAD00000
57b9a1ef21SChander Kashyap #define S5P_CHECK_LPA			0xABAD0000
58b9a1ef21SChander Kashyap 
5980615006SJoe Hershberger #undef CONFIG_CMD_PING
60b9a1ef21SChander Kashyap #define CONFIG_CMD_ELF
61b9a1ef21SChander Kashyap #define CONFIG_CMD_DHCP
62b9a1ef21SChander Kashyap #undef CONFIG_CMD_NET
63b9a1ef21SChander Kashyap #undef CONFIG_CMD_NFS
64b9a1ef21SChander Kashyap 
6598a48c5dSChander Kashyap /* MMC SPL */
6698a48c5dSChander Kashyap #define COPY_BL2_FNPTR_ADDR	0x02020030
678a00061eSInderpal Singh #define CONFIG_SPL_TEXT_BASE	0x02021410
688a00061eSInderpal Singh 
69b9a1ef21SChander Kashyap #define CONFIG_BOOTCOMMAND	"fatload mmc 0 40007000 uImage; bootm 40007000"
70b9a1ef21SChander Kashyap 
71b9a1ef21SChander Kashyap #define CONFIG_IDENT_STRING		" for ORIGEN"
72b9a1ef21SChander Kashyap 
73b9a1ef21SChander Kashyap #define CONFIG_CLK_1000_400_200
74b9a1ef21SChander Kashyap 
75b9a1ef21SChander Kashyap /* MIU (Memory Interleaving Unit) */
76b9a1ef21SChander Kashyap #define CONFIG_MIU_2BIT_21_7_INTERLEAVED
77b9a1ef21SChander Kashyap 
78bf7716d6SPiotr Wilczek #define CONFIG_ENV_IS_IN_MMC
79b9a1ef21SChander Kashyap #define CONFIG_SYS_MMC_ENV_DEV		0
80b9a1ef21SChander Kashyap #define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KB */
81b9a1ef21SChander Kashyap #define RESERVE_BLOCK_SIZE		(512)
82b9a1ef21SChander Kashyap #define BL1_SIZE			(16 << 10) /*16 K reserved for BL1*/
83b9a1ef21SChander Kashyap #define CONFIG_ENV_OFFSET		(RESERVE_BLOCK_SIZE + BL1_SIZE)
84b9a1ef21SChander Kashyap 
85643be9c0SRajeshwari Shinde #define CONFIG_SPL_LDSCRIPT	"board/samsung/common/exynos-uboot-spl.lds"
86643be9c0SRajeshwari Shinde #define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
87643be9c0SRajeshwari Shinde 
88643be9c0SRajeshwari Shinde #define CONFIG_SYS_INIT_SP_ADDR		0x02040000
8998a48c5dSChander Kashyap 
9098a48c5dSChander Kashyap /* U-boot copy size from boot Media to DRAM.*/
9198a48c5dSChander Kashyap #define COPY_BL2_SIZE		0x80000
9298a48c5dSChander Kashyap #define BL2_START_OFFSET	((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
9398a48c5dSChander Kashyap #define BL2_SIZE_BLOC_COUNT	(COPY_BL2_SIZE/512)
94099e884aSAngus Ainslie 
95b9a1ef21SChander Kashyap #endif	/* __CONFIG_H */
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