1*3e76d62aSSteve Sakoman /* 2*3e76d62aSSteve Sakoman * (C) Copyright 2010 3*3e76d62aSSteve Sakoman * Texas Instruments Incorporated. 4*3e76d62aSSteve Sakoman * Aneesh V <aneesh@ti.com> 5*3e76d62aSSteve Sakoman * Steve Sakoman <steve@sakoman.com> 6*3e76d62aSSteve Sakoman * 7*3e76d62aSSteve Sakoman * Configuration settings for the TI SDP4430 board. 8*3e76d62aSSteve Sakoman * 9*3e76d62aSSteve Sakoman * See file CREDITS for list of people who contributed to this 10*3e76d62aSSteve Sakoman * project. 11*3e76d62aSSteve Sakoman * 12*3e76d62aSSteve Sakoman * This program is free software; you can redistribute it and/or 13*3e76d62aSSteve Sakoman * modify it under the terms of the GNU General Public License as 14*3e76d62aSSteve Sakoman * published by the Free Software Foundation; either version 2 of 15*3e76d62aSSteve Sakoman * the License, or (at your option) any later version. 16*3e76d62aSSteve Sakoman * 17*3e76d62aSSteve Sakoman * This program is distributed in the hope that it will be useful, 18*3e76d62aSSteve Sakoman * but WITHOUT ANY WARRANTY; without even the implied warranty of 19*3e76d62aSSteve Sakoman * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20*3e76d62aSSteve Sakoman * GNU General Public License for more details. 21*3e76d62aSSteve Sakoman * 22*3e76d62aSSteve Sakoman * You should have received a copy of the GNU General Public License 23*3e76d62aSSteve Sakoman * along with this program; if not, write to the Free Software 24*3e76d62aSSteve Sakoman * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25*3e76d62aSSteve Sakoman * MA 02111-1307 USA 26*3e76d62aSSteve Sakoman */ 27*3e76d62aSSteve Sakoman 28*3e76d62aSSteve Sakoman #ifndef __CONFIG_H 29*3e76d62aSSteve Sakoman #define __CONFIG_H 30*3e76d62aSSteve Sakoman 31*3e76d62aSSteve Sakoman /* 32*3e76d62aSSteve Sakoman * High Level Configuration Options 33*3e76d62aSSteve Sakoman */ 34*3e76d62aSSteve Sakoman #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ 35*3e76d62aSSteve Sakoman #define CONFIG_OMAP 1 /* in a TI OMAP core */ 36*3e76d62aSSteve Sakoman #define CONFIG_OMAP44XX 1 /* which is a 44XX */ 37*3e76d62aSSteve Sakoman #define CONFIG_OMAP4430 1 /* which is in a 4430 */ 38*3e76d62aSSteve Sakoman #define CONFIG_4430SDP 1 /* working with SDP */ 39*3e76d62aSSteve Sakoman 40*3e76d62aSSteve Sakoman /* Get CPU defs */ 41*3e76d62aSSteve Sakoman #include <asm/arch/cpu.h> 42*3e76d62aSSteve Sakoman #include <asm/arch/omap4.h> 43*3e76d62aSSteve Sakoman 44*3e76d62aSSteve Sakoman /* Display CPU and Board Info */ 45*3e76d62aSSteve Sakoman #define CONFIG_DISPLAY_CPUINFO 1 46*3e76d62aSSteve Sakoman #define CONFIG_DISPLAY_BOARDINFO 1 47*3e76d62aSSteve Sakoman 48*3e76d62aSSteve Sakoman /* Keep L2 Cache Disabled */ 49*3e76d62aSSteve Sakoman #define CONFIG_L2_OFF 1 50*3e76d62aSSteve Sakoman 51*3e76d62aSSteve Sakoman /* Clock Defines */ 52*3e76d62aSSteve Sakoman #define V_OSCK 38400000 /* Clock output from T2 */ 53*3e76d62aSSteve Sakoman #define V_SCLK V_OSCK 54*3e76d62aSSteve Sakoman 55*3e76d62aSSteve Sakoman #undef CONFIG_USE_IRQ /* no support for IRQs */ 56*3e76d62aSSteve Sakoman #define CONFIG_MISC_INIT_R 57*3e76d62aSSteve Sakoman 58*3e76d62aSSteve Sakoman #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 59*3e76d62aSSteve Sakoman #define CONFIG_SETUP_MEMORY_TAGS 1 60*3e76d62aSSteve Sakoman #define CONFIG_INITRD_TAG 1 61*3e76d62aSSteve Sakoman #define CONFIG_REVISION_TAG 1 62*3e76d62aSSteve Sakoman 63*3e76d62aSSteve Sakoman /* 64*3e76d62aSSteve Sakoman * Size of malloc() pool 65*3e76d62aSSteve Sakoman * Total Size Environment - 256k 66*3e76d62aSSteve Sakoman * Malloc - add 256k 67*3e76d62aSSteve Sakoman */ 68*3e76d62aSSteve Sakoman #define CONFIG_ENV_SIZE (256 << 10) 69*3e76d62aSSteve Sakoman #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) 70*3e76d62aSSteve Sakoman #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ 71*3e76d62aSSteve Sakoman /* initial data */ 72*3e76d62aSSteve Sakoman /* Vector Base */ 73*3e76d62aSSteve Sakoman #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE 74*3e76d62aSSteve Sakoman 75*3e76d62aSSteve Sakoman /* 76*3e76d62aSSteve Sakoman * Hardware drivers 77*3e76d62aSSteve Sakoman */ 78*3e76d62aSSteve Sakoman 79*3e76d62aSSteve Sakoman /* 80*3e76d62aSSteve Sakoman * serial port - NS16550 compatible 81*3e76d62aSSteve Sakoman */ 82*3e76d62aSSteve Sakoman #define V_NS16550_CLK 48000000 83*3e76d62aSSteve Sakoman 84*3e76d62aSSteve Sakoman #define CONFIG_SYS_NS16550 85*3e76d62aSSteve Sakoman #define CONFIG_SYS_NS16550_SERIAL 86*3e76d62aSSteve Sakoman #define CONFIG_SYS_NS16550_REG_SIZE (-4) 87*3e76d62aSSteve Sakoman #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 88*3e76d62aSSteve Sakoman #define CONFIG_CONS_INDEX 3 89*3e76d62aSSteve Sakoman #define CONFIG_SYS_NS16550_COM3 UART3_BASE 90*3e76d62aSSteve Sakoman 91*3e76d62aSSteve Sakoman #define CONFIG_ENV_IS_NOWHERE 92*3e76d62aSSteve Sakoman #define CONFIG_ENV_OVERWRITE 93*3e76d62aSSteve Sakoman #define CONFIG_BAUDRATE 115200 94*3e76d62aSSteve Sakoman #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 95*3e76d62aSSteve Sakoman 115200} 96*3e76d62aSSteve Sakoman 97*3e76d62aSSteve Sakoman /* I2C */ 98*3e76d62aSSteve Sakoman #define CONFIG_HARD_I2C 1 99*3e76d62aSSteve Sakoman #define CONFIG_SYS_I2C_SPEED 100000 100*3e76d62aSSteve Sakoman #define CONFIG_SYS_I2C_SLAVE 1 101*3e76d62aSSteve Sakoman #define CONFIG_SYS_I2C_BUS 0 102*3e76d62aSSteve Sakoman #define CONFIG_SYS_I2C_BUS_SELECT 1 103*3e76d62aSSteve Sakoman #define CONFIG_DRIVER_OMAP34XX_I2C 1 104*3e76d62aSSteve Sakoman #define CONFIG_I2C_MULTI_BUS 1 105*3e76d62aSSteve Sakoman 106*3e76d62aSSteve Sakoman /* MMC */ 107*3e76d62aSSteve Sakoman #define CONFIG_MMC 1 108*3e76d62aSSteve Sakoman #define CONFIG_OMAP3_MMC 1 109*3e76d62aSSteve Sakoman #define CONFIG_SYS_MMC_SET_DEV 1 110*3e76d62aSSteve Sakoman #define CONFIG_DOS_PARTITION 1 111*3e76d62aSSteve Sakoman 112*3e76d62aSSteve Sakoman /* Flash */ 113*3e76d62aSSteve Sakoman #define CONFIG_SYS_NO_FLASH 1 114*3e76d62aSSteve Sakoman 115*3e76d62aSSteve Sakoman /* commands to include */ 116*3e76d62aSSteve Sakoman #include <config_cmd_default.h> 117*3e76d62aSSteve Sakoman 118*3e76d62aSSteve Sakoman /* Enabled commands */ 119*3e76d62aSSteve Sakoman #define CONFIG_CMD_EXT2 /* EXT2 Support */ 120*3e76d62aSSteve Sakoman #define CONFIG_CMD_FAT /* FAT support */ 121*3e76d62aSSteve Sakoman #define CONFIG_CMD_I2C /* I2C serial bus support */ 122*3e76d62aSSteve Sakoman #define CONFIG_CMD_MMC /* MMC support */ 123*3e76d62aSSteve Sakoman 124*3e76d62aSSteve Sakoman /* Disabled commands */ 125*3e76d62aSSteve Sakoman #undef CONFIG_CMD_NET 126*3e76d62aSSteve Sakoman #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 127*3e76d62aSSteve Sakoman #undef CONFIG_CMD_IMLS /* List all found images */ 128*3e76d62aSSteve Sakoman 129*3e76d62aSSteve Sakoman /* 130*3e76d62aSSteve Sakoman * Enabling relocation of u-boot by default 131*3e76d62aSSteve Sakoman * Relocation can be skipped if u-boot is copied to the TEXT_BASE 132*3e76d62aSSteve Sakoman */ 133*3e76d62aSSteve Sakoman #undef CONFIG_SKIP_RELOCATE_UBOOT 134*3e76d62aSSteve Sakoman 135*3e76d62aSSteve Sakoman /* 136*3e76d62aSSteve Sakoman * Environment setup 137*3e76d62aSSteve Sakoman */ 138*3e76d62aSSteve Sakoman 139*3e76d62aSSteve Sakoman /* allow overwriting serial config and ethaddr */ 140*3e76d62aSSteve Sakoman #define CONFIG_ENV_OVERWRITE 141*3e76d62aSSteve Sakoman 142*3e76d62aSSteve Sakoman #define CONFIG_EXTRA_ENV_SETTINGS \ 143*3e76d62aSSteve Sakoman "loadaddr=0x82000000\0" \ 144*3e76d62aSSteve Sakoman "console=ttyS2,115200n8\0" \ 145*3e76d62aSSteve Sakoman "mmcdev=1\0" \ 146*3e76d62aSSteve Sakoman "mmcroot=/dev/mmcblk0p2 rw\0" \ 147*3e76d62aSSteve Sakoman "mmcrootfstype=ext3 rootwait\0" \ 148*3e76d62aSSteve Sakoman "mmcargs=setenv bootargs console=${console} " \ 149*3e76d62aSSteve Sakoman "root=${mmcroot} " \ 150*3e76d62aSSteve Sakoman "rootfstype=${mmcrootfstype}\0" \ 151*3e76d62aSSteve Sakoman "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 152*3e76d62aSSteve Sakoman "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 153*3e76d62aSSteve Sakoman "source ${loadaddr}\0" \ 154*3e76d62aSSteve Sakoman "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 155*3e76d62aSSteve Sakoman "mmcboot=echo Booting from mmc${mmcdev} ...; " \ 156*3e76d62aSSteve Sakoman "run mmcargs; " \ 157*3e76d62aSSteve Sakoman "bootm ${loadaddr}\0" \ 158*3e76d62aSSteve Sakoman 159*3e76d62aSSteve Sakoman #define CONFIG_BOOTCOMMAND \ 160*3e76d62aSSteve Sakoman "if mmc init ${mmcdev}; then " \ 161*3e76d62aSSteve Sakoman "if run loadbootscript; then " \ 162*3e76d62aSSteve Sakoman "run bootscript; " \ 163*3e76d62aSSteve Sakoman "else " \ 164*3e76d62aSSteve Sakoman "if run loaduimage; then " \ 165*3e76d62aSSteve Sakoman "run mmcboot; " \ 166*3e76d62aSSteve Sakoman "else run nandboot; " \ 167*3e76d62aSSteve Sakoman "fi; " \ 168*3e76d62aSSteve Sakoman "fi; " \ 169*3e76d62aSSteve Sakoman "fi" 170*3e76d62aSSteve Sakoman 171*3e76d62aSSteve Sakoman #define CONFIG_AUTO_COMPLETE 1 172*3e76d62aSSteve Sakoman 173*3e76d62aSSteve Sakoman /* 174*3e76d62aSSteve Sakoman * Miscellaneous configurable options 175*3e76d62aSSteve Sakoman */ 176*3e76d62aSSteve Sakoman 177*3e76d62aSSteve Sakoman #define CONFIG_SYS_LONGHELP /* undef to save memory */ 178*3e76d62aSSteve Sakoman #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 179*3e76d62aSSteve Sakoman #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 180*3e76d62aSSteve Sakoman #define CONFIG_SYS_PROMPT "OMAP4430 SDP # " 181*3e76d62aSSteve Sakoman #define CONFIG_SYS_CBSIZE 256 182*3e76d62aSSteve Sakoman /* Print Buffer Size */ 183*3e76d62aSSteve Sakoman #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 184*3e76d62aSSteve Sakoman sizeof(CONFIG_SYS_PROMPT) + 16) 185*3e76d62aSSteve Sakoman #define CONFIG_SYS_MAXARGS 16 186*3e76d62aSSteve Sakoman /* Boot Argument Buffer Size */ 187*3e76d62aSSteve Sakoman #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 188*3e76d62aSSteve Sakoman 189*3e76d62aSSteve Sakoman /* 190*3e76d62aSSteve Sakoman * memtest setup 191*3e76d62aSSteve Sakoman */ 192*3e76d62aSSteve Sakoman #define CONFIG_SYS_MEMTEST_START 0x80000000 193*3e76d62aSSteve Sakoman #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) 194*3e76d62aSSteve Sakoman 195*3e76d62aSSteve Sakoman /* Default load address */ 196*3e76d62aSSteve Sakoman #define CONFIG_SYS_LOAD_ADDR 0x80000000 197*3e76d62aSSteve Sakoman 198*3e76d62aSSteve Sakoman /* Use General purpose timer 1 */ 199*3e76d62aSSteve Sakoman #define CONFIG_SYS_TIMERBASE GPT1_BASE 200*3e76d62aSSteve Sakoman #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 201*3e76d62aSSteve Sakoman #define CONFIG_SYS_HZ 1000 202*3e76d62aSSteve Sakoman 203*3e76d62aSSteve Sakoman /* 204*3e76d62aSSteve Sakoman * Stack sizes 205*3e76d62aSSteve Sakoman * 206*3e76d62aSSteve Sakoman * The stack sizes are set up in start.S using the settings below 207*3e76d62aSSteve Sakoman */ 208*3e76d62aSSteve Sakoman #define CONFIG_STACKSIZE (128 << 10) /* Regular stack */ 209*3e76d62aSSteve Sakoman #ifdef CONFIG_USE_IRQ 210*3e76d62aSSteve Sakoman #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */ 211*3e76d62aSSteve Sakoman #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ 212*3e76d62aSSteve Sakoman #endif 213*3e76d62aSSteve Sakoman 214*3e76d62aSSteve Sakoman /* 215*3e76d62aSSteve Sakoman * SDRAM Memory Map 216*3e76d62aSSteve Sakoman * Even though we use two CS all the memory 217*3e76d62aSSteve Sakoman * is mapped to one contiguous block 218*3e76d62aSSteve Sakoman */ 219*3e76d62aSSteve Sakoman #define CONFIG_NR_DRAM_BANKS 1 220*3e76d62aSSteve Sakoman 221*3e76d62aSSteve Sakoman #endif /* __CONFIG_H */ 222